JPS5557161A - Error checking system - Google Patents
Error checking systemInfo
- Publication number
- JPS5557161A JPS5557161A JP13015078A JP13015078A JPS5557161A JP S5557161 A JPS5557161 A JP S5557161A JP 13015078 A JP13015078 A JP 13015078A JP 13015078 A JP13015078 A JP 13015078A JP S5557161 A JPS5557161 A JP S5557161A
- Authority
- JP
- Japan
- Prior art keywords
- bit
- bit error
- bits
- circuit
- error
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Tests Of Electronic Circuits (AREA)
- Detection And Correction Of Errors (AREA)
Abstract
PURPOSE: To secure the correct detection for the 3-bit error by distinguishing the 3-bit error from the 1-bit error in the form of the multiple bits without increasing the redundant bits in the 1-bit error correction 2-bit error detection circuit.
CONSTITUTION: Original information 10 of 64 bits is supplied to check bit production circuit 11 to produce 1-bit/2-bit error detection check bit 12 of the 8-bit structure. Bit 12 is applied to the original information and then written into semiconductor memory 13 in the form of the writing data of 72 bits. In memory 13 the IC memory elements which are read out simultaneously from one chip with every 4 bits exist in 18 chips, and data 14 of 72 bits is divided by 4 bits into 18 blocks to be memorized in each chip. Data 14 is then applied to 1-bit error correction / 2-bit error detection circuit 15 comprising check circuit 16, error decision circuit 17 and error correction circuit 18 each. Circuit 16 decides whether data 14 is the 1-bit error or the uncorrectable 2-bit error, and then deliveres error indication signal 19 in the case of the 1-bit error and error detection signal 20 in the case of the 2-bit error respectively.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53130150A JPS6010661B2 (en) | 1978-10-23 | 1978-10-23 | Error checking method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53130150A JPS6010661B2 (en) | 1978-10-23 | 1978-10-23 | Error checking method |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5557161A true JPS5557161A (en) | 1980-04-26 |
JPS6010661B2 JPS6010661B2 (en) | 1985-03-19 |
Family
ID=15027167
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP53130150A Expired JPS6010661B2 (en) | 1978-10-23 | 1978-10-23 | Error checking method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6010661B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5878241A (en) * | 1981-11-04 | 1983-05-11 | Nippon Telegr & Teleph Corp <Ntt> | Error detecting and correcting system for coded data |
JPH1011307A (en) * | 1996-06-27 | 1998-01-16 | Nec Corp | Main storage device |
-
1978
- 1978-10-23 JP JP53130150A patent/JPS6010661B2/en not_active Expired
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5878241A (en) * | 1981-11-04 | 1983-05-11 | Nippon Telegr & Teleph Corp <Ntt> | Error detecting and correcting system for coded data |
JPH1011307A (en) * | 1996-06-27 | 1998-01-16 | Nec Corp | Main storage device |
Also Published As
Publication number | Publication date |
---|---|
JPS6010661B2 (en) | 1985-03-19 |
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