JPS6421651A - Memory device - Google Patents

Memory device

Info

Publication number
JPS6421651A
JPS6421651A JP62178427A JP17842787A JPS6421651A JP S6421651 A JPS6421651 A JP S6421651A JP 62178427 A JP62178427 A JP 62178427A JP 17842787 A JP17842787 A JP 17842787A JP S6421651 A JPS6421651 A JP S6421651A
Authority
JP
Japan
Prior art keywords
bit
parity
data
rams
sent
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62178427A
Other languages
Japanese (ja)
Inventor
Mitsuo Kurakake
Jiro Kinoshita
Fumio Kawamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fanuc Corp
Original Assignee
Fanuc Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fanuc Corp filed Critical Fanuc Corp
Priority to JP62178427A priority Critical patent/JPS6421651A/en
Priority to PCT/JP1988/000703 priority patent/WO1989000731A1/en
Publication of JPS6421651A publication Critical patent/JPS6421651A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1048Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Detection And Correction Of Errors (AREA)

Abstract

PURPOSE:To reduce the number of memories in use by using a parity RAM enabling to read/write of plural bits at the same time as a memory for adding parity bit. CONSTITUTION:As the parity bit added to data for data RAMs 20-27, the parity bits for 8 sets of RAMs of 32kX8-bit through an interface circuit 5 for 8-bit each into a parity RAM 4 comprising 32kX8-bit RAMs. Then the 8-bit parity bits stored is added to a data read one by one bit each corresponding to the data address by the operation of the circuit 5 at parity check and sent to a comparator circuit 7 to apply parity check. If any error is detected, a signal is sent.
JP62178427A 1987-07-17 1987-07-17 Memory device Pending JPS6421651A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP62178427A JPS6421651A (en) 1987-07-17 1987-07-17 Memory device
PCT/JP1988/000703 WO1989000731A1 (en) 1987-07-17 1988-07-15 Memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62178427A JPS6421651A (en) 1987-07-17 1987-07-17 Memory device

Publications (1)

Publication Number Publication Date
JPS6421651A true JPS6421651A (en) 1989-01-25

Family

ID=16048317

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62178427A Pending JPS6421651A (en) 1987-07-17 1987-07-17 Memory device

Country Status (2)

Country Link
JP (1) JPS6421651A (en)
WO (1) WO1989000731A1 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0314149A (en) * 1989-06-13 1991-01-22 Matsushita Electric Ind Co Ltd Read/write controller of memory unit
JPH03229339A (en) * 1990-02-05 1991-10-11 Nec Corp Memory data error detecting circuit
US8385174B2 (en) 2007-09-26 2013-02-26 Tdk Corporation Method for evaluating read signal
JP2013080455A (en) * 2011-09-30 2013-05-02 Rambus Inc Sharing check bit memory device between groups of memory devices

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100437468B1 (en) * 2002-07-26 2004-06-23 삼성전자주식회사 Semiconductor memory device with data input/output organization of a multiple of 9

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57117198A (en) * 1981-01-13 1982-07-21 Omron Tateisi Electronics Co Memory system with parity
JPS61214040A (en) * 1985-03-20 1986-09-22 Fujitsu Ltd Parity circuit of memory

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5588154A (en) * 1978-12-27 1980-07-03 Fujitsu Ltd Data storage method
JPS593797A (en) * 1982-06-30 1984-01-10 Fujitsu Ltd Storage device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57117198A (en) * 1981-01-13 1982-07-21 Omron Tateisi Electronics Co Memory system with parity
JPS61214040A (en) * 1985-03-20 1986-09-22 Fujitsu Ltd Parity circuit of memory

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0314149A (en) * 1989-06-13 1991-01-22 Matsushita Electric Ind Co Ltd Read/write controller of memory unit
JPH03229339A (en) * 1990-02-05 1991-10-11 Nec Corp Memory data error detecting circuit
US8385174B2 (en) 2007-09-26 2013-02-26 Tdk Corporation Method for evaluating read signal
JP2013080455A (en) * 2011-09-30 2013-05-02 Rambus Inc Sharing check bit memory device between groups of memory devices

Also Published As

Publication number Publication date
WO1989000731A1 (en) 1989-01-26

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