JPS5528578A - Memory ic driving system - Google Patents

Memory ic driving system

Info

Publication number
JPS5528578A
JPS5528578A JP10201778A JP10201778A JPS5528578A JP S5528578 A JPS5528578 A JP S5528578A JP 10201778 A JP10201778 A JP 10201778A JP 10201778 A JP10201778 A JP 10201778A JP S5528578 A JPS5528578 A JP S5528578A
Authority
JP
Japan
Prior art keywords
memory
error
gate
units
fault
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10201778A
Other languages
Japanese (ja)
Inventor
Shigeo Kaneda
Masamitsu Kobayashi
Keiichi Adachi
Yoshimi Tachibana
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Nippon Telegraph and Telephone Corp
Original Assignee
NEC Corp
Nippon Telegraph and Telephone Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Telegraph and Telephone Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP10201778A priority Critical patent/JPS5528578A/en
Publication of JPS5528578A publication Critical patent/JPS5528578A/en
Pending legal-status Critical Current

Links

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  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

PURPOSE: To realize reduction of the number for the error occurrence bits by securing a fixed connection between the memory IC and the memory IC driving buffer gate.
CONSTITUTION: The writing/reading is given to IC memories 1 forming a number of IC memory groups in accordance with the bit signals given from registor 3. About 8 units of memory 1 among these memory groups which belong to the same group and receive the simultaneous writing and reading are connected with every 4 units in parallel to memory IC driving buffer gate 5 to be then driven with every two units by the driving signals sent from gate 5. As a result, the error is reduced down to 2 bits even in case gate 5 has some fault, thus preventing the error for many bits beyond the correction/detection capacity of the error correction code. In such way, the fault can be detected by the detection capacity of the error code to omit the fault detecting additional gate.
COPYRIGHT: (C)1980,JPO&Japio
JP10201778A 1978-08-22 1978-08-22 Memory ic driving system Pending JPS5528578A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10201778A JPS5528578A (en) 1978-08-22 1978-08-22 Memory ic driving system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10201778A JPS5528578A (en) 1978-08-22 1978-08-22 Memory ic driving system

Publications (1)

Publication Number Publication Date
JPS5528578A true JPS5528578A (en) 1980-02-29

Family

ID=14315976

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10201778A Pending JPS5528578A (en) 1978-08-22 1978-08-22 Memory ic driving system

Country Status (1)

Country Link
JP (1) JPS5528578A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7284584B2 (en) 2003-06-11 2007-10-23 Topy Kogyo Kabushiki Kaisha Laterally installing wheel

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51128235A (en) * 1975-04-30 1976-11-09 Toshiba Corp A semi-conductor integration circuit memory

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51128235A (en) * 1975-04-30 1976-11-09 Toshiba Corp A semi-conductor integration circuit memory

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7284584B2 (en) 2003-06-11 2007-10-23 Topy Kogyo Kabushiki Kaisha Laterally installing wheel

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