JPS5411647A - Buffer retray system - Google Patents

Buffer retray system

Info

Publication number
JPS5411647A
JPS5411647A JP7631677A JP7631677A JPS5411647A JP S5411647 A JPS5411647 A JP S5411647A JP 7631677 A JP7631677 A JP 7631677A JP 7631677 A JP7631677 A JP 7631677A JP S5411647 A JPS5411647 A JP S5411647A
Authority
JP
Japan
Prior art keywords
buffer
retray
entry
buffer memory
loading
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7631677A
Other languages
Japanese (ja)
Other versions
JPS5826119B2 (en
Inventor
Makoto Shinohara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP52076316A priority Critical patent/JPS5826119B2/ja
Publication of JPS5411647A publication Critical patent/JPS5411647A/en
Publication of JPS5826119B2 publication Critical patent/JPS5826119B2/ja
Expired legal-status Critical Current

Links

Abstract

PURPOSE: To prevent lowering in the function of buffer memory, by reading out the data from the main memory and loading it to the BM entry, when the readout data carry any error from the BM entry of the buffer memory.
COPYRIGHT: (C)1979,JPO&Japio
JP52076316A 1977-06-27 1977-06-27 Expired JPS5826119B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP52076316A JPS5826119B2 (en) 1977-06-27 1977-06-27

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP52076316A JPS5826119B2 (en) 1977-06-27 1977-06-27

Publications (2)

Publication Number Publication Date
JPS5411647A true JPS5411647A (en) 1979-01-27
JPS5826119B2 JPS5826119B2 (en) 1983-05-31

Family

ID=13601958

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52076316A Expired JPS5826119B2 (en) 1977-06-27 1977-06-27

Country Status (1)

Country Link
JP (1) JPS5826119B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6708294B1 (en) 1999-09-08 2004-03-16 Fujitsu Limited Cache memory apparatus and computer readable recording medium on which a program for controlling a cache memory is recorded
JP2007148467A (en) * 2005-11-24 2007-06-14 Nec Computertechno Ltd Information processor and its error processing method, and control program

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5228825A (en) * 1975-08-29 1977-03-04 Toshiba Corp Multiple memory unit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5228825A (en) * 1975-08-29 1977-03-04 Toshiba Corp Multiple memory unit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6708294B1 (en) 1999-09-08 2004-03-16 Fujitsu Limited Cache memory apparatus and computer readable recording medium on which a program for controlling a cache memory is recorded
JP2007148467A (en) * 2005-11-24 2007-06-14 Nec Computertechno Ltd Information processor and its error processing method, and control program

Also Published As

Publication number Publication date
JPS5826119B2 (en) 1983-05-31

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