JPS5525812A - Writing system for error correction code - Google Patents

Writing system for error correction code

Info

Publication number
JPS5525812A
JPS5525812A JP9654378A JP9654378A JPS5525812A JP S5525812 A JPS5525812 A JP S5525812A JP 9654378 A JP9654378 A JP 9654378A JP 9654378 A JP9654378 A JP 9654378A JP S5525812 A JPS5525812 A JP S5525812A
Authority
JP
Japan
Prior art keywords
error correction
correction code
data
address
writing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9654378A
Other languages
Japanese (ja)
Other versions
JPS6222199B2 (en
Inventor
Masafumi Kubo
Shin Maeda
Takao Imura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panafacom Ltd
Original Assignee
Panafacom Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panafacom Ltd filed Critical Panafacom Ltd
Priority to JP9654378A priority Critical patent/JPS5525812A/en
Publication of JPS5525812A publication Critical patent/JPS5525812A/en
Publication of JPS6222199B2 publication Critical patent/JPS6222199B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Detection And Correction Of Errors (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)

Abstract

PURPOSE: To ensure a complete test for the error correction code generator/detector by writing the data given from outside into the memory part in the form of the error correction code.
CONSTITUTION: When CPU receives the reading data, the error correction code which is not in agrlement with the reading data is produced to be used as the writing data. Then the address, for example, 100 is issued as the address information, and the address 100 reads out the writing order and the data with register 8 set to "1". This data is sent to driver 9 as the error correction code via error correction code generator/detctor 2 to drive drivers 9 and 10, and the writing data and the error correction code which is not in agreement with the writing data are written into address 100 of memory 1. Then CPU designates address 100 to carry out the reading order, and detector 2 detects the error for the reading data and the error correction code not in agreement with the reading data. Under these conditions, the normal operation is proved. In this way, the various kinds of the tests become possible for detector 2.
COPYRIGHT: (C)1980,JPO&Japio
JP9654378A 1978-08-08 1978-08-08 Writing system for error correction code Granted JPS5525812A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9654378A JPS5525812A (en) 1978-08-08 1978-08-08 Writing system for error correction code

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9654378A JPS5525812A (en) 1978-08-08 1978-08-08 Writing system for error correction code

Publications (2)

Publication Number Publication Date
JPS5525812A true JPS5525812A (en) 1980-02-23
JPS6222199B2 JPS6222199B2 (en) 1987-05-16

Family

ID=14168012

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9654378A Granted JPS5525812A (en) 1978-08-08 1978-08-08 Writing system for error correction code

Country Status (1)

Country Link
JP (1) JPS5525812A (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61161563A (en) * 1985-01-11 1986-07-22 Nec Corp Storage device
JPS6225936A (en) * 1985-07-12 1987-02-03 ユニリ−バ−　ナ−ムロ−ゼ　ベンノ−トシヤ−プ Fat composition and its production
JPS6243750A (en) * 1985-08-20 1987-02-25 Nec Corp Stored data processing circuit
JPS62165254A (en) * 1986-01-17 1987-07-21 Hitachi Ltd Storage device with ecc circuit
JPS62211757A (en) * 1986-03-12 1987-09-17 Fujitsu Ltd Error correcting circuit testing system
JPH01309421A (en) * 1988-03-17 1989-12-13 Fujitsu Ltd Error correction system
KR100972375B1 (en) 2002-05-22 2010-07-27 유니챰 가부시키가이샤 Panty type diaper
US8910004B2 (en) 2012-03-30 2014-12-09 Fujitsu Limited Information processing apparatus, and method of controlling information processing apparatus
US9612891B2 (en) 2013-09-25 2017-04-04 Fujitsu Limited Memory controller, information processing apparatus, and method of controlling information processing apparatus

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4704078B2 (en) * 2004-12-20 2011-06-15 富士通セミコンダクター株式会社 Semiconductor memory

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61161563A (en) * 1985-01-11 1986-07-22 Nec Corp Storage device
JPS6225936A (en) * 1985-07-12 1987-02-03 ユニリ−バ−　ナ−ムロ−ゼ　ベンノ−トシヤ−プ Fat composition and its production
JPH0441599B2 (en) * 1985-07-12 1992-07-08 Unilever Nv
JPS6243750A (en) * 1985-08-20 1987-02-25 Nec Corp Stored data processing circuit
JPS62165254A (en) * 1986-01-17 1987-07-21 Hitachi Ltd Storage device with ecc circuit
JPS62211757A (en) * 1986-03-12 1987-09-17 Fujitsu Ltd Error correcting circuit testing system
JPH01309421A (en) * 1988-03-17 1989-12-13 Fujitsu Ltd Error correction system
KR100972375B1 (en) 2002-05-22 2010-07-27 유니챰 가부시키가이샤 Panty type diaper
US8910004B2 (en) 2012-03-30 2014-12-09 Fujitsu Limited Information processing apparatus, and method of controlling information processing apparatus
US9612891B2 (en) 2013-09-25 2017-04-04 Fujitsu Limited Memory controller, information processing apparatus, and method of controlling information processing apparatus

Also Published As

Publication number Publication date
JPS6222199B2 (en) 1987-05-16

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