JPS5685172A - Rewriting system pseudoerror - Google Patents
Rewriting system pseudoerrorInfo
- Publication number
- JPS5685172A JPS5685172A JP16249279A JP16249279A JPS5685172A JP S5685172 A JPS5685172 A JP S5685172A JP 16249279 A JP16249279 A JP 16249279A JP 16249279 A JP16249279 A JP 16249279A JP S5685172 A JPS5685172 A JP S5685172A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- address
- data
- error
- pseudodisk
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
PURPOSE: To realize a high efficiency for a defect producing system, by shunting the reading data of an IC memory to a buffer register in case an error data is written into the IC memory due to an defective pseudomedium and then carrying out a rewriting to the IC memory during the retrial.
CONSTITUTION: The pseudodisk device 1 consists of the IC memory 3 replaced with a memory medium and the pseudodisk unit 2 which perform a pseudocontrol using the memory 3 as a disk unit. Thus during the writing via the channel device CHC, the data stored in the memory 3 is stored temporarily in the buffer register R2 when a coincidence is obtained between the error address registers R4/R4' and the address counter AC which counts the clock signals to use them for the medium address. Then an optional error data is written into an optional error address. For the retrial, the contents of the register R2 is rewritten into the memory 3.
COPYRIGHT: (C)1981,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP54162492A JPS5918748B2 (en) | 1979-12-14 | 1979-12-14 | Pseudo-error rewriting method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP54162492A JPS5918748B2 (en) | 1979-12-14 | 1979-12-14 | Pseudo-error rewriting method |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5685172A true JPS5685172A (en) | 1981-07-11 |
JPS5918748B2 JPS5918748B2 (en) | 1984-04-28 |
Family
ID=15755640
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP54162492A Expired JPS5918748B2 (en) | 1979-12-14 | 1979-12-14 | Pseudo-error rewriting method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5918748B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6421544A (en) * | 1987-07-17 | 1989-01-24 | Hitachi Ltd | Fault generation system |
-
1979
- 1979-12-14 JP JP54162492A patent/JPS5918748B2/en not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6421544A (en) * | 1987-07-17 | 1989-01-24 | Hitachi Ltd | Fault generation system |
Also Published As
Publication number | Publication date |
---|---|
JPS5918748B2 (en) | 1984-04-28 |
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