JPS55163837A - Manufacturing for semiconductor device - Google Patents

Manufacturing for semiconductor device

Info

Publication number
JPS55163837A
JPS55163837A JP7104279A JP7104279A JPS55163837A JP S55163837 A JPS55163837 A JP S55163837A JP 7104279 A JP7104279 A JP 7104279A JP 7104279 A JP7104279 A JP 7104279A JP S55163837 A JPS55163837 A JP S55163837A
Authority
JP
Japan
Prior art keywords
film
silicon film
polycrystalline silicon
given
oxidized
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7104279A
Other languages
English (en)
Other versions
JPS6043656B2 (ja
Inventor
Jiro Oshima
Masaharu Aoyama
Seiji Yasuda
Toshio Yonezawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP54071042A priority Critical patent/JPS6043656B2/ja
Priority to US06/152,305 priority patent/US4403392A/en
Priority to DE8080103063T priority patent/DE3071207D1/de
Priority to EP80103063A priority patent/EP0021133B1/en
Publication of JPS55163837A publication Critical patent/JPS55163837A/ja
Publication of JPS6043656B2 publication Critical patent/JPS6043656B2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53271Conductive materials containing semiconductor material, e.g. polysilicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251Diffusion into or out of group IV semiconductors
    • H01L21/2254Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2257Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer being silicon or silicide or SIPOS, e.g. polysilicon, porous silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5226Via connections in a multilevel interconnection structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/914Doping
    • Y10S438/92Controlling diffusion profile by oxidation
JP54071042A 1979-06-06 1979-06-06 半導体装置の製造方法 Expired JPS6043656B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP54071042A JPS6043656B2 (ja) 1979-06-06 1979-06-06 半導体装置の製造方法
US06/152,305 US4403392A (en) 1979-06-06 1980-05-22 Method of manufacturing a semiconductor device
DE8080103063T DE3071207D1 (en) 1979-06-06 1980-06-02 Semiconductor device comprising an interconnection electrode and method of manufacturing the same
EP80103063A EP0021133B1 (en) 1979-06-06 1980-06-02 Semiconductor device comprising an interconnection electrode and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54071042A JPS6043656B2 (ja) 1979-06-06 1979-06-06 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS55163837A true JPS55163837A (en) 1980-12-20
JPS6043656B2 JPS6043656B2 (ja) 1985-09-30

Family

ID=13449061

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54071042A Expired JPS6043656B2 (ja) 1979-06-06 1979-06-06 半導体装置の製造方法

Country Status (4)

Country Link
US (1) US4403392A (ja)
EP (1) EP0021133B1 (ja)
JP (1) JPS6043656B2 (ja)
DE (1) DE3071207D1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02105464A (ja) * 1988-10-13 1990-04-18 Nec Corp 半導体装置の製造方法

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2525389A1 (fr) * 1982-04-14 1983-10-21 Commissariat Energie Atomique Procede de positionnement d'une ligne d'interconnexion sur un trou de contact electrique d'un circuit integre
EP0112662A1 (en) * 1982-12-21 1984-07-04 Northern Telecom Limited Stacked MOS devices with polysilicon interconnects
DE3304642A1 (de) * 1983-02-10 1984-08-16 Siemens AG, 1000 Berlin und 8000 München Integrierte halbleiterschaltung mit bipolartransistor-strukturen und verfahren zu ihrer herstellung
JPS6063961A (ja) * 1983-08-30 1985-04-12 Fujitsu Ltd 半導体装置の製造方法
JPS60138940A (ja) * 1983-12-27 1985-07-23 Toshiba Corp 半導体装置の製造方法
US4555842A (en) * 1984-03-19 1985-12-03 At&T Bell Laboratories Method of fabricating VLSI CMOS devices having complementary threshold voltages
EP0160941A3 (en) * 1984-05-07 1987-03-25 General Electric Company High voltage interconnect system for a semiconductor integrated circuit
JPS6181653A (ja) * 1984-09-28 1986-04-25 Nec Corp 半導体装置の自己整合誘電体分離方法
US5084413A (en) * 1986-04-15 1992-01-28 Matsushita Electric Industrial Co., Ltd. Method for filling contact hole
GB2193034B (en) * 1986-07-25 1990-01-04 Plessey Co Plc Process for the production of bipolar devices
JP2904533B2 (ja) * 1989-03-09 1999-06-14 株式会社東芝 半導体装置の製造方法
US4927773A (en) * 1989-06-05 1990-05-22 Santa Barbara Research Center Method of minimizing implant-related damage to a group II-VI semiconductor material
KR920004366B1 (ko) * 1989-09-08 1992-06-04 현대전자산업 주식회사 반도체 장치의 자기 정렬 콘택 제조방법
US5057439A (en) * 1990-02-12 1991-10-15 Electric Power Research Institute Method of fabricating polysilicon emitters for solar cells
EP0459772B1 (en) * 1990-05-31 1996-11-20 Canon Kabushiki Kaisha Method of forming the wiring of a semiconductor circuit

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3928095A (en) * 1972-11-08 1975-12-23 Suwa Seikosha Kk Semiconductor device and process for manufacturing same
US3904450A (en) * 1974-04-26 1975-09-09 Bell Telephone Labor Inc Method of fabricating injection logic integrated circuits using oxide isolation
US4074304A (en) * 1974-10-04 1978-02-14 Nippon Electric Company, Ltd. Semiconductor device having a miniature junction area and process for fabricating same
JPS51127682A (en) * 1975-04-30 1976-11-06 Fujitsu Ltd Manufacturing process of semiconductor device
JPS5816337B2 (ja) * 1975-06-13 1983-03-30 日本電気株式会社 半導体装置の製造方法
FR2340619A1 (fr) * 1976-02-04 1977-09-02 Radiotechnique Compelec Perfectionnement au procede de fabrication de dispositifs semiconducteurs et dispositifs ainsi obtenus
JPS606108B2 (ja) * 1976-07-07 1985-02-15 株式会社東芝 半導体装置の製造方法
US4123300A (en) * 1977-05-02 1978-10-31 International Business Machines Corporation Integrated circuit process utilizing lift-off techniques

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02105464A (ja) * 1988-10-13 1990-04-18 Nec Corp 半導体装置の製造方法

Also Published As

Publication number Publication date
DE3071207D1 (en) 1985-12-05
EP0021133A3 (en) 1983-07-20
JPS6043656B2 (ja) 1985-09-30
EP0021133B1 (en) 1985-10-30
EP0021133A2 (en) 1981-01-07
US4403392A (en) 1983-09-13

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