JPS5468159A - Method of forming semiconductor wafer gettered - Google Patents

Method of forming semiconductor wafer gettered

Info

Publication number
JPS5468159A
JPS5468159A JP11753378A JP11753378A JPS5468159A JP S5468159 A JPS5468159 A JP S5468159A JP 11753378 A JP11753378 A JP 11753378A JP 11753378 A JP11753378 A JP 11753378A JP S5468159 A JPS5468159 A JP S5468159A
Authority
JP
Japan
Prior art keywords
gettered
semiconductor wafer
forming semiconductor
forming
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11753378A
Other languages
English (en)
Other versions
JPS6141133B2 (ja
Inventor
Donarudo Edomonzu Harorudo
Maakobitsutsu Geerii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS5468159A publication Critical patent/JPS5468159A/ja
Publication of JPS6141133B2 publication Critical patent/JPS6141133B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B7/00—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor
    • B24B7/20—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground
    • B24B7/22—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground for grinding inorganic material, e.g. stone, ceramics, porcelain
    • B24B7/228—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground for grinding inorganic material, e.g. stone, ceramics, porcelain for grinding thin, brittle parts, e.g. semiconductors, wafers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/017—Clean surfaces
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/024—Defect control-gettering and annealing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/051—Etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/06—Gettering
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/061—Gettering-armorphous layers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/138—Roughened surface
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/974—Substrate surface preparation
JP11753378A 1977-10-31 1978-09-26 Method of forming semiconductor wafer gettered Granted JPS5468159A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/847,383 US4144099A (en) 1977-10-31 1977-10-31 High performance silicon wafer and fabrication process

Publications (2)

Publication Number Publication Date
JPS5468159A true JPS5468159A (en) 1979-06-01
JPS6141133B2 JPS6141133B2 (ja) 1986-09-12

Family

ID=25300487

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11753378A Granted JPS5468159A (en) 1977-10-31 1978-09-26 Method of forming semiconductor wafer gettered

Country Status (4)

Country Link
US (1) US4144099A (ja)
EP (1) EP0001794B1 (ja)
JP (1) JPS5468159A (ja)
DE (1) DE2860307D1 (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01143222A (ja) * 1987-11-06 1989-06-05 Wacker Chemitronic Ges Elekton Grundstoffe Mbh 大きい絶縁破壊強さを持つ酸化物層をつくるためのシリコンスライス及びその製法
JPH09115914A (ja) * 1995-09-14 1997-05-02 Wacker Siltronic G Fuer Halbleitermaterialien Ag 半導体ウエハの裏面に積層欠陥誘発傷をつける方法

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JPS54110783A (en) * 1978-02-20 1979-08-30 Hitachi Ltd Semiconductor substrate and its manufacture
FR2435818A1 (fr) * 1978-09-08 1980-04-04 Ibm France Procede pour accroitre l'effet de piegeage interne des corps semi-conducteurs
DE2927220A1 (de) * 1979-07-05 1981-01-15 Wacker Chemitronic Verfahren zur stapelfehlerinduzierenden oberflaechenzerstoerung von halbleiterscheiben
US4257827A (en) * 1979-11-13 1981-03-24 International Business Machines Corporation High efficiency gettering in silicon through localized superheated melt formation
US4597804A (en) * 1981-03-11 1986-07-01 Fujitsu Limited Methods of forming denuded zone in wafer by intrinsic gettering and forming bipolar transistor therein
JPS58138033A (ja) * 1982-02-10 1983-08-16 Toshiba Corp 半導体基板及び半導体装置の製造方法
US4410395A (en) * 1982-05-10 1983-10-18 Fairchild Camera & Instrument Corporation Method of removing bulk impurities from semiconductor wafers
DE3339942C1 (de) * 1983-11-04 1985-01-31 GMN Georg Müller Nürnberg GmbH, 8500 Nürnberg Bearbeiten von scheibenfoermigen Werkstuecken aus sproedbruechigen Werkstoffen
DE3246480A1 (de) * 1982-12-15 1984-06-20 Wacker-Chemitronic Gesellschaft für Elektronik-Grundstoffe mbH, 8263 Burghausen Verfahren zur herstellung von halbleiterscheiben mit getternder scheibenrueckseite
US4631804A (en) * 1984-12-10 1986-12-30 At&T Bell Laboratories Technique for reducing substrate warpage springback using a polysilicon subsurface strained layer
US4659400A (en) * 1985-06-27 1987-04-21 General Instrument Corp. Method for forming high yield epitaxial wafers
JPH06103678B2 (ja) * 1987-11-28 1994-12-14 株式会社東芝 半導体基板の加工方法
US4879258A (en) * 1988-08-31 1989-11-07 Texas Instruments Incorporated Integrated circuit planarization by mechanical polishing
JP2645478B2 (ja) * 1988-10-07 1997-08-25 富士通株式会社 半導体装置の製造方法
US4946376A (en) * 1989-04-06 1990-08-07 Motorola, Inc. Backside metallization scheme for semiconductor devices
JP2671494B2 (ja) * 1989-05-16 1997-10-29 富士通株式会社 ゲッタリング方法
JP2575545B2 (ja) * 1990-07-05 1997-01-29 株式会社東芝 半導体装置の製造方法
DE4108394C2 (de) * 1991-03-15 1994-09-08 Komatsu Denshi Kinzoku Kk Verfahren zum Herstellen eines Siliziumsubstrats für eine Halbleitereinrichtung
US5244819A (en) * 1991-10-22 1993-09-14 Honeywell Inc. Method to getter contamination in semiconductor devices
JP3024409B2 (ja) * 1992-12-25 2000-03-21 日本電気株式会社 半導体装置の製造方法
US5360509A (en) * 1993-03-08 1994-11-01 Gi Corporation Low cost method of fabricating epitaxial semiconductor devices
US5389579A (en) * 1993-04-05 1995-02-14 Motorola, Inc. Method for single sided polishing of a semiconductor wafer
US5733175A (en) * 1994-04-25 1998-03-31 Leach; Michael A. Polishing a workpiece using equal velocity at all points overlapping a polisher
JP2719113B2 (ja) * 1994-05-24 1998-02-25 信越半導体株式会社 単結晶シリコンウェーハの歪付け方法
US5607341A (en) * 1994-08-08 1997-03-04 Leach; Michael A. Method and structure for polishing a wafer during manufacture of integrated circuits
US5899743A (en) * 1995-03-13 1999-05-04 Komatsu Electronic Metals Co., Ltd. Method for fabricating semiconductor wafers
JP3828176B2 (ja) * 1995-02-28 2006-10-04 コマツ電子金属株式会社 半導体ウェハの製造方法
JP3534207B2 (ja) * 1995-05-16 2004-06-07 コマツ電子金属株式会社 半導体ウェーハの製造方法
US6022807A (en) * 1996-04-24 2000-02-08 Micro Processing Technology, Inc. Method for fabricating an integrated circuit
DE19704546A1 (de) * 1997-02-06 1998-08-13 Wacker Siltronic Halbleitermat Verfahren zur Herstellung einer einseitig beschichteten und mit einem Finish versehenen Halbleiterscheibe
DE19711550C2 (de) * 1997-03-20 2000-06-21 Bayer Ag Verfahren zur Herstellung von im wesentlichen Randzonen-freien Formteilen aus multikristallinem Silicium und die Verwendung dieser Formteile
US6251754B1 (en) * 1997-05-09 2001-06-26 Denso Corporation Semiconductor substrate manufacturing method
US6100167A (en) * 1997-05-29 2000-08-08 Memc Electronic Materials, Inc. Process for the removal of copper from polished boron doped silicon wafers
CN1272222A (zh) * 1997-08-21 2000-11-01 Memc电子材料有限公司 处理半导体晶片的方法
US5929508A (en) * 1998-05-21 1999-07-27 Harris Corp Defect gettering by induced stress
JP3328193B2 (ja) * 1998-07-08 2002-09-24 信越半導体株式会社 半導体ウエーハの製造方法
JP3329288B2 (ja) * 1998-11-26 2002-09-30 信越半導体株式会社 半導体ウエーハおよびその製造方法
US6214704B1 (en) 1998-12-16 2001-04-10 Memc Electronic Materials, Inc. Method of processing semiconductor wafers to build in back surface damage
US6340326B1 (en) 2000-01-28 2002-01-22 Lam Research Corporation System and method for controlled polishing and planarization of semiconductor wafers
US6705930B2 (en) * 2000-01-28 2004-03-16 Lam Research Corporation System and method for polishing and planarizing semiconductor wafers using reduced surface area polishing pads and variable partial pad-wafer overlapping techniques
US6640155B2 (en) 2000-08-22 2003-10-28 Lam Research Corporation Chemical mechanical polishing apparatus and methods with central control of polishing pressure applied by polishing head
US6652357B1 (en) 2000-09-22 2003-11-25 Lam Research Corporation Methods for controlling retaining ring and wafer head tilt for chemical mechanical polishing
US7481695B2 (en) 2000-08-22 2009-01-27 Lam Research Corporation Polishing apparatus and methods having high processing workload for controlling polishing pressure applied by polishing head
US6585572B1 (en) 2000-08-22 2003-07-01 Lam Research Corporation Subaperture chemical mechanical polishing system
US6471566B1 (en) 2000-09-18 2002-10-29 Lam Research Corporation Sacrificial retaining ring CMP system and methods for implementing the same
US6443815B1 (en) 2000-09-22 2002-09-03 Lam Research Corporation Apparatus and methods for controlling pad conditioning head tilt for chemical mechanical polishing
TWI280425B (en) * 2002-12-20 2007-05-01 Hon Hai Prec Ind Co Ltd Method of fabricating light guide plate having diffusion function
JP4345357B2 (ja) * 2003-05-27 2009-10-14 株式会社Ｓｕｍｃｏ 半導体ウェーハの製造方法
JP2005093869A (ja) * 2003-09-19 2005-04-07 Mimasu Semiconductor Industry Co Ltd シリコンウエーハの再生方法及び再生ウエーハ
JP4878738B2 (ja) * 2004-04-30 2012-02-15 株式会社ディスコ 半導体デバイスの加工方法
US20070105483A1 (en) * 2005-11-04 2007-05-10 Honeywell International Inc. Methods and apparatus for discrete mirror processing
JP2009238853A (ja) * 2008-03-26 2009-10-15 Tokyo Seimitsu Co Ltd ウェーハ処理方法およびウェーハ処理装置
JP2013229356A (ja) * 2012-04-24 2013-11-07 Mitsubishi Electric Corp Ｓｏｉウェハおよびその製造方法、並びにｍｅｍｓデバイス
CN104425274A (zh) * 2013-09-03 2015-03-18 北大方正集团有限公司 一种dmos晶体管的制备方法及dmos晶体管

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01143222A (ja) * 1987-11-06 1989-06-05 Wacker Chemitronic Ges Elekton Grundstoffe Mbh 大きい絶縁破壊強さを持つ酸化物層をつくるためのシリコンスライス及びその製法
JPH09115914A (ja) * 1995-09-14 1997-05-02 Wacker Siltronic G Fuer Halbleitermaterialien Ag 半導体ウエハの裏面に積層欠陥誘発傷をつける方法

Also Published As

Publication number Publication date
DE2860307D1 (en) 1981-02-19
EP0001794A1 (de) 1979-05-16
US4144099A (en) 1979-03-13
JPS6141133B2 (ja) 1986-09-12
EP0001794B1 (de) 1980-12-10

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