JPS54148389A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS54148389A
JPS54148389A JP5693378A JP5693378A JPS54148389A JP S54148389 A JPS54148389 A JP S54148389A JP 5693378 A JP5693378 A JP 5693378A JP 5693378 A JP5693378 A JP 5693378A JP S54148389 A JPS54148389 A JP S54148389A
Authority
JP
Japan
Prior art keywords
layer
poly
substrate
manufacture
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5693378A
Other languages
Japanese (ja)
Inventor
Masahiro Yoneda
Yoichi Akasaka
Katsuhiro Tsukamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP5693378A priority Critical patent/JPS54148389A/en
Publication of JPS54148389A publication Critical patent/JPS54148389A/en
Pending legal-status Critical Current

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  • Element Separation (AREA)

Abstract

PURPOSE: To reduce the number of projections by laminating the poly Si and Si3N4 on one main surface of the Si substrate and then forming the heat oxide film on the exposed surface of the substrate after removing the prescribed areas uniformly of the poly Si and Si3N4.
CONSTITUTION: Poly Si10 and Si3N45 are laminated on one surface of semiconductor substrate 3. Part of both layer 5 and 10 plus layer 2 are removed uniformly by the plasma etching and via resist mask 7. Then heat oxide layer 9 is formed on exposed epitaxial layer 2 after removing the mask. After this, layer 5 and 10 are removed, thus reducing greatly the bird peak of layer 9.
COPYRIGHT: (C)1979,JPO&Japio
JP5693378A 1978-05-12 1978-05-12 Manufacture of semiconductor device Pending JPS54148389A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5693378A JPS54148389A (en) 1978-05-12 1978-05-12 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5693378A JPS54148389A (en) 1978-05-12 1978-05-12 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS54148389A true JPS54148389A (en) 1979-11-20

Family

ID=13041309

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5693378A Pending JPS54148389A (en) 1978-05-12 1978-05-12 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS54148389A (en)

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