JPS5550636A - Preparation of semiconductor device - Google Patents

Preparation of semiconductor device

Info

Publication number
JPS5550636A
JPS5550636A JP12362878A JP12362878A JPS5550636A JP S5550636 A JPS5550636 A JP S5550636A JP 12362878 A JP12362878 A JP 12362878A JP 12362878 A JP12362878 A JP 12362878A JP S5550636 A JPS5550636 A JP S5550636A
Authority
JP
Japan
Prior art keywords
separation region
sio
manufactured
lateral direction
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12362878A
Other languages
Japanese (ja)
Other versions
JPS6136381B2 (en
Inventor
Hisao Nakajima
Akira Sato
Tokuo Kure
Akira Shintani
Masao Kawamura
Masanobu Miyao
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP12362878A priority Critical patent/JPS5550636A/en
Publication of JPS5550636A publication Critical patent/JPS5550636A/en
Publication of JPS6136381B2 publication Critical patent/JPS6136381B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

PURPOSE: To improve the density of integration, by preventing the bulging out of an insulating separation region in the lateral direction.
CONSTITUTION: SiO22 and Si3N43 are stacked on a surface of a Si monocrystal 1, and a groove 6 is manufactured by etching the films 3, 2 and the crystal 1 by CF4 gas by using a resist mask. In this case, the peaks of Si3N4 are formed. A SiO2 film 4 is made up to the groove 6 by means of wet oxidation, and Si with approximate 10KeV energy is shot on the whole surface. The film 3 is removed by hot phossphoric acid, and a poly Si layer 5 is manufactured by means of a known selection growth method using SiCl4, thus completing a separation layer. Since there is no oxidation in the lateral direction according to this method, the width of a separation region is extremely narrowed, and an IC circuit can be compacted. And since the separation region and a surface of an electrical, active region become the same plane and birdheads are not built up on the separation region, disconnection can be prevented.
COPYRIGHT: (C)1980,JPO&Japio
JP12362878A 1978-10-09 1978-10-09 Preparation of semiconductor device Granted JPS5550636A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12362878A JPS5550636A (en) 1978-10-09 1978-10-09 Preparation of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12362878A JPS5550636A (en) 1978-10-09 1978-10-09 Preparation of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5550636A true JPS5550636A (en) 1980-04-12
JPS6136381B2 JPS6136381B2 (en) 1986-08-18

Family

ID=14865281

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12362878A Granted JPS5550636A (en) 1978-10-09 1978-10-09 Preparation of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5550636A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5939581U (en) * 1982-09-02 1984-03-13 三洋電機株式会社 White balance correction circuit
US5653802A (en) * 1988-03-27 1997-08-05 Canon Kabushiki Kaisha Method for forming crystal
US5733369A (en) * 1986-03-28 1998-03-31 Canon Kabushiki Kaisha Method for forming crystal
US5846320A (en) * 1986-03-31 1998-12-08 Canon Kabushiki Kaisha Method for forming crystal and crystal article obtained by said method

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0259886U (en) * 1988-10-17 1990-05-01

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5939581U (en) * 1982-09-02 1984-03-13 三洋電機株式会社 White balance correction circuit
JPH0422616Y2 (en) * 1982-09-02 1992-05-25
US5733369A (en) * 1986-03-28 1998-03-31 Canon Kabushiki Kaisha Method for forming crystal
US5853478A (en) * 1986-03-28 1998-12-29 Canon Kabushiki Kaisha Method for forming crystal and crystal article obtained by said method
US5846320A (en) * 1986-03-31 1998-12-08 Canon Kabushiki Kaisha Method for forming crystal and crystal article obtained by said method
US5653802A (en) * 1988-03-27 1997-08-05 Canon Kabushiki Kaisha Method for forming crystal

Also Published As

Publication number Publication date
JPS6136381B2 (en) 1986-08-18

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