JPH11204791A - 半導体装置及びその製造方法 - Google Patents

半導体装置及びその製造方法

Info

Publication number
JPH11204791A
JPH11204791A JP10162154A JP16215498A JPH11204791A JP H11204791 A JPH11204791 A JP H11204791A JP 10162154 A JP10162154 A JP 10162154A JP 16215498 A JP16215498 A JP 16215498A JP H11204791 A JPH11204791 A JP H11204791A
Authority
JP
Japan
Prior art keywords
film
silicon
metal
forming
silicide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10162154A
Other languages
English (en)
Japanese (ja)
Other versions
JPH11204791A5 (enExample
Inventor
Toshihiko Iinuma
俊彦 飯沼
Kyoichi Suguro
恭一 須黒
Souichi Nadahara
壮一 灘原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP10162154A priority Critical patent/JPH11204791A/ja
Priority to US09/192,232 priority patent/US5989988A/en
Publication of JPH11204791A publication Critical patent/JPH11204791A/ja
Publication of JPH11204791A5 publication Critical patent/JPH11204791A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • H10D64/0111—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors
    • H10D64/0112—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors using conductive layers comprising silicides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01306—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon
    • H10D64/01308—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon the conductor further comprising a non-elemental silicon additional conductive layer, e.g. a metal silicide layer formed by the reaction of silicon with an implanted metal
    • H10D64/0131—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon the conductor further comprising a non-elemental silicon additional conductive layer, e.g. a metal silicide layer formed by the reaction of silicon with an implanted metal the additional conductive layer comprising a silicide layer formed by the silicidation reaction between the layer of silicon with a metal layer which is not formed by metal implantation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
JP10162154A 1997-11-17 1998-06-10 半導体装置及びその製造方法 Pending JPH11204791A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP10162154A JPH11204791A (ja) 1997-11-17 1998-06-10 半導体装置及びその製造方法
US09/192,232 US5989988A (en) 1997-11-17 1998-11-16 Semiconductor device and method of manufacturing the same

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP31517397 1997-11-17
JP9-315173 1997-11-17
JP10162154A JPH11204791A (ja) 1997-11-17 1998-06-10 半導体装置及びその製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2007263671A Division JP2008060594A (ja) 1997-11-17 2007-10-09 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPH11204791A true JPH11204791A (ja) 1999-07-30
JPH11204791A5 JPH11204791A5 (enExample) 2005-04-07

Family

ID=26488046

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10162154A Pending JPH11204791A (ja) 1997-11-17 1998-06-10 半導体装置及びその製造方法

Country Status (2)

Country Link
US (1) US5989988A (enExample)
JP (1) JPH11204791A (enExample)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002353443A (ja) * 2001-05-23 2002-12-06 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JP2007503116A (ja) * 2003-08-15 2007-02-15 マイクロン・テクノロジー・インコーポレーテッド 集積化金属珪化物ゲート電極を有するトランジスタの形成方法
WO2010092863A1 (ja) 2009-02-10 2010-08-19 日鉱金属株式会社 ニッケル合金スパッタリングターゲット及びニッケルシリサイド膜
WO2011115259A1 (ja) 2010-03-19 2011-09-22 Jx日鉱日石金属株式会社 ニッケル合金スパッタリングターゲット、Ｎｉ合金薄膜及びニッケルシリサイド膜
WO2024195739A1 (ja) * 2023-03-23 2024-09-26 ソニーセミコンダクタソリューションズ株式会社 固体撮像装置およびその製造方法

Families Citing this family (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4001662B2 (ja) * 1997-06-27 2007-10-31 株式会社半導体エネルギー研究所 シリコンの洗浄方法および多結晶シリコンの作製方法
US6218274B1 (en) * 1997-10-28 2001-04-17 Sony Corporation Semiconductor device and manufacturing method thereof
KR100276388B1 (ko) * 1997-10-30 2001-01-15 윤종용 코발트/니오븀 이중 금속층 구조를 이용한 실리사이드 형성 방법
JPH11283935A (ja) * 1998-03-30 1999-10-15 Nec Corp 半導体装置の製造方法
US6207563B1 (en) 1999-02-05 2001-03-27 Advanced Micro Devices, Inc. Low-leakage CoSi2-processing by high temperature thermal processing
US6440851B1 (en) * 1999-10-12 2002-08-27 International Business Machines Corporation Method and structure for controlling the interface roughness of cobalt disilicide
JP3554514B2 (ja) * 1999-12-03 2004-08-18 松下電器産業株式会社 半導体装置及びその製造方法
US6281102B1 (en) 2000-01-13 2001-08-28 Integrated Device Technology, Inc. Cobalt silicide structure for improving gate oxide integrity and method for fabricating same
US6365516B1 (en) * 2000-01-14 2002-04-02 Advanced Micro Devices, Inc. Advanced cobalt silicidation with in-situ hydrogen plasma clean
US6653227B1 (en) * 2000-08-31 2003-11-25 Chartered Semiconductor Manufacturing Ltd. Method of cobalt silicidation using an oxide-Titanium interlayer
US6346477B1 (en) * 2001-01-09 2002-02-12 Research Foundation Of Suny - New York Method of interlayer mediated epitaxy of cobalt silicide from low temperature chemical vapor deposition of cobalt
US6388327B1 (en) 2001-01-09 2002-05-14 International Business Machines Corporation Capping layer for improved silicide formation in narrow semiconductor structures
JP3614782B2 (ja) * 2001-01-19 2005-01-26 シャープ株式会社 半導体装置の製造方法及びその方法により製造される半導体装置
US6524940B2 (en) * 2001-04-26 2003-02-25 Applied Materials, Inc. Methods and devices utilizing the ammonium termination of silicon dioxide films
US6730592B2 (en) * 2001-12-21 2004-05-04 Micron Technology, Inc. Methods for planarization of metal-containing surfaces using halogens and halide salts
US6884723B2 (en) 2001-12-21 2005-04-26 Micron Technology, Inc. Methods for planarization of group VIII metal-containing surfaces using complexing agents
US20030119316A1 (en) * 2001-12-21 2003-06-26 Micron Technology, Inc. Methods for planarization of group VIII metal-containing surfaces using oxidizing agents
US7121926B2 (en) 2001-12-21 2006-10-17 Micron Technology, Inc. Methods for planarization of group VIII metal-containing surfaces using a fixed abrasive article
US7049237B2 (en) * 2001-12-21 2006-05-23 Micron Technology, Inc. Methods for planarization of Group VIII metal-containing surfaces using oxidizing gases
US6734099B2 (en) * 2001-12-28 2004-05-11 Texas Insturments Incorporated System for preventing excess silicon consumption in ultra shallow junctions
US6743721B2 (en) 2002-06-10 2004-06-01 United Microelectronics Corp. Method and system for making cobalt silicide
JP2004047608A (ja) * 2002-07-10 2004-02-12 Toshiba Corp 半導体装置及びその製造方法
JP4466902B2 (ja) * 2003-01-10 2010-05-26 日鉱金属株式会社 ニッケル合金スパッタリングターゲット
KR100558006B1 (ko) * 2003-11-17 2006-03-06 삼성전자주식회사 니켈 샐리사이드 공정들 및 이를 사용하여 반도체소자를제조하는 방법들
KR100629266B1 (ko) * 2004-08-09 2006-09-29 삼성전자주식회사 샐리사이드 공정 및 이를 사용한 반도체 소자의 제조방법
JP4904482B2 (ja) * 2005-01-18 2012-03-28 国立大学法人東北大学 半導体装置
KR100832714B1 (ko) * 2005-12-28 2008-05-28 동부일렉트로닉스 주식회사 트랜지스터의 제조방법
JP2008103465A (ja) * 2006-10-18 2008-05-01 Toshiba Corp 半導体装置及びその製造方法
US8431995B2 (en) * 2010-05-13 2013-04-30 International Business Machines Corporation Methodology for fabricating isotropically recessed drain regions of CMOS transistors
US8716798B2 (en) 2010-05-13 2014-05-06 International Business Machines Corporation Methodology for fabricating isotropically recessed source and drain regions of CMOS transistors
CN103337452A (zh) * 2013-06-26 2013-10-02 上海华力微电子有限公司 在硅锗层上形成镍自对准硅化物的工艺方法
KR102238257B1 (ko) 2014-08-26 2021-04-13 삼성전자주식회사 반도체 소자의 제조 방법
US9385197B2 (en) * 2014-08-29 2016-07-05 Taiwan Semiconductor Manufacturing Co., Ltd Semiconductor structure with contact over source/drain structure and method for forming the same
US9755047B2 (en) * 2015-10-27 2017-09-05 United Microelectronics Corp. Semiconductor process and semiconductor device
US11088033B2 (en) 2016-09-08 2021-08-10 International Business Machines Corporation Low resistance source-drain contacts using high temperature silicides

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4663191A (en) * 1985-10-25 1987-05-05 International Business Machines Corporation Salicide process for forming low sheet resistance doped silicon junctions
JP2891092B2 (ja) * 1994-03-07 1999-05-17 日本電気株式会社 半導体装置の製造方法
US5624869A (en) * 1994-04-13 1997-04-29 International Business Machines Corporation Method of forming a film for a multilayer Semiconductor device for improving thermal stability of cobalt silicide using platinum or nitrogen
US5744395A (en) * 1996-10-16 1998-04-28 Taiwan Semiconductor Manufacturing Company, Ltd. Low resistance, self-aligned, titanium silicide structures, using a single rapid thermal anneal procedure
US5780349A (en) * 1997-02-20 1998-07-14 National Semiconductor Corporation Self-aligned MOSFET gate/source/drain salicide formation
US5851891A (en) * 1997-04-21 1998-12-22 Advanced Micro Devices, Inc. IGFET method of forming with silicide contact on ultra-thin gate

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002353443A (ja) * 2001-05-23 2002-12-06 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JP2007503116A (ja) * 2003-08-15 2007-02-15 マイクロン・テクノロジー・インコーポレーテッド 集積化金属珪化物ゲート電極を有するトランジスタの形成方法
JP4826914B2 (ja) * 2003-08-15 2011-11-30 マイクロン テクノロジー， インク． 集積化金属珪化物ゲート電極を有するトランジスタの形成方法
WO2010092863A1 (ja) 2009-02-10 2010-08-19 日鉱金属株式会社 ニッケル合金スパッタリングターゲット及びニッケルシリサイド膜
WO2011115259A1 (ja) 2010-03-19 2011-09-22 Jx日鉱日石金属株式会社 ニッケル合金スパッタリングターゲット、Ｎｉ合金薄膜及びニッケルシリサイド膜
WO2024195739A1 (ja) * 2023-03-23 2024-09-26 ソニーセミコンダクタソリューションズ株式会社 固体撮像装置およびその製造方法

Also Published As

Publication number Publication date
US5989988A (en) 1999-11-23

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