JPH11145420A - 半導体記憶装置 - Google Patents

半導体記憶装置

Info

Publication number
JPH11145420A
JPH11145420A JP9305830A JP30583097A JPH11145420A JP H11145420 A JPH11145420 A JP H11145420A JP 9305830 A JP9305830 A JP 9305830A JP 30583097 A JP30583097 A JP 30583097A JP H11145420 A JPH11145420 A JP H11145420A
Authority
JP
Japan
Prior art keywords
array
aspect ratio
memory
column
control circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP9305830A
Other languages
English (en)
Japanese (ja)
Other versions
JPH11145420A5 (https=
Inventor
Yasuhiko Tsukikawa
靖彦 月川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP9305830A priority Critical patent/JPH11145420A/ja
Priority to US09/059,202 priority patent/US5966316A/en
Publication of JPH11145420A publication Critical patent/JPH11145420A/ja
Publication of JPH11145420A5 publication Critical patent/JPH11145420A5/ja
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/04—Supports for storage elements, e.g. memory modules; Mounting or fixing of storage elements on such supports

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
  • Semiconductor Memories (AREA)
JP9305830A 1997-11-07 1997-11-07 半導体記憶装置 Withdrawn JPH11145420A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP9305830A JPH11145420A (ja) 1997-11-07 1997-11-07 半導体記憶装置
US09/059,202 US5966316A (en) 1997-11-07 1998-04-14 Semiconductor memory device having storage capacity of 22N+1 bits

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9305830A JPH11145420A (ja) 1997-11-07 1997-11-07 半導体記憶装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2007159108A Division JP2007306012A (ja) 2007-06-15 2007-06-15 ダイナミックランダムアクセスメモリおよび半導体記憶装置

Publications (2)

Publication Number Publication Date
JPH11145420A true JPH11145420A (ja) 1999-05-28
JPH11145420A5 JPH11145420A5 (https=) 2005-06-30

Family

ID=17949894

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9305830A Withdrawn JPH11145420A (ja) 1997-11-07 1997-11-07 半導体記憶装置

Country Status (2)

Country Link
US (1) US5966316A (https=)
JP (1) JPH11145420A (https=)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004063074A (ja) * 2002-07-26 2004-02-26 Samsung Electronics Co Ltd 半導体メモリ装置
JP2005533369A (ja) * 2002-04-10 2005-11-04 ハイニックス セミコンダクター インコーポレイテッド 非四角形メモリバンクを有するメモリチップアーキテクチャ、及びメモリバンク配置方法
US7495943B2 (en) 2006-01-24 2009-02-24 Hitachi, Ltd. Semiconductor memory device
JP2011526048A (ja) * 2008-06-27 2011-09-29 クゥアルコム・インコーポレイテッド 動的電力を節約するメモリアーキテクチャ

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3104686B2 (ja) * 1998-08-25 2000-10-30 日本電気株式会社 集積回路装置
KR100302597B1 (ko) * 1998-12-04 2001-09-22 김영환 반도체메모리구조
DE10055001A1 (de) * 2000-11-07 2002-05-16 Infineon Technologies Ag Speicheranordnung mit einem zentralen Anschlussfeld
JP4989821B2 (ja) 2001-02-06 2012-08-01 ルネサスエレクトロニクス株式会社 半導体記憶装置
JP2002237188A (ja) * 2001-02-13 2002-08-23 Mitsubishi Electric Corp 半導体記憶装置
US6962399B2 (en) * 2002-12-30 2005-11-08 Lexmark International, Inc. Method of warning a user of end of life of a consumable for an ink jet printer
JP4693656B2 (ja) * 2006-03-06 2011-06-01 株式会社東芝 不揮発性半導体記憶装置
US8120989B2 (en) * 2007-06-25 2012-02-21 Qualcomm Incorporated Concurrent multiple-dimension word-addressable memory architecture
US7990798B2 (en) * 2007-10-15 2011-08-02 Qimonda Ag Integrated circuit including a memory module having a plurality of memory banks
JP2009295740A (ja) * 2008-06-04 2009-12-17 Elpida Memory Inc メモリチップ及び半導体装置
TW201530726A (zh) * 2014-01-29 2015-08-01 Eorex Corp 記憶體與記憶體儲存裝置
KR102219296B1 (ko) * 2014-08-14 2021-02-23 삼성전자 주식회사 반도체 패키지

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3242101B2 (ja) * 1990-10-05 2001-12-25 三菱電機株式会社 半導体集積回路
JP2996324B2 (ja) * 1992-08-28 1999-12-27 日本電気株式会社 半導体集積回路装置
KR0137105B1 (ko) * 1993-06-17 1998-04-29 모리시다 요이치 데이터 전송회로, 데이터선 구동회로, 증폭회로, 반도체 집적회로 및 반도체 기억장치
JP3577148B2 (ja) * 1995-11-28 2004-10-13 株式会社ルネサステクノロジ 半導体記憶装置
KR0172426B1 (ko) * 1995-12-21 1999-03-30 김광호 반도체 메모리장치

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005533369A (ja) * 2002-04-10 2005-11-04 ハイニックス セミコンダクター インコーポレイテッド 非四角形メモリバンクを有するメモリチップアーキテクチャ、及びメモリバンク配置方法
US8305833B2 (en) 2002-04-10 2012-11-06 658868 N.B. Inc. Memory chip architecture having non-rectangular memory banks and method for arranging memory banks
JP2004063074A (ja) * 2002-07-26 2004-02-26 Samsung Electronics Co Ltd 半導体メモリ装置
US7495943B2 (en) 2006-01-24 2009-02-24 Hitachi, Ltd. Semiconductor memory device
US7706208B2 (en) 2006-01-24 2010-04-27 Hitachi, Ltd. Semiconductor memory device
JP2011526048A (ja) * 2008-06-27 2011-09-29 クゥアルコム・インコーポレイテッド 動的電力を節約するメモリアーキテクチャ
KR101339875B1 (ko) * 2008-06-27 2013-12-10 퀄컴 인코포레이티드 동적 전력 절감 메모리 아키텍처

Also Published As

Publication number Publication date
US5966316A (en) 1999-10-12

Similar Documents

Publication Publication Date Title
JP4632107B2 (ja) 半導体記憶装置
US5943285A (en) Arrangement of memory blocks and pads
US6453400B1 (en) Semiconductor integrated circuit device
US5379248A (en) Semiconductor memory device
US6240039B1 (en) Semiconductor memory device and driving signal generator therefor
US6735144B2 (en) Semiconductor integrated circuit device
US6404661B2 (en) Semiconductor storage device having arrangement for controlling activation of sense amplifiers
JPH11145420A (ja) 半導体記憶装置
US5621679A (en) Semiconductor memory device for achieving high bandwidth and method for arranging signal lines therefor
US5831921A (en) Semiconductor memory device having signal generating circuitry for sequentially refreshing memory cells in each memory cell block in a self-refresh mode
JP3863968B2 (ja) 半導体記憶装置
JP3018498B2 (ja) 半導体記憶装置
US6856559B2 (en) Semiconductor memory device
US6330202B1 (en) Semiconductor memory device having write data line
JP3028913B2 (ja) 半導体記憶装置
JP2845187B2 (ja) 半導体記憶装置
KR100374632B1 (ko) 반도체 메모리장치 및 이의 메모리셀 어레이 블락 제어방법
US6160751A (en) Semiconductor memory device allowing efficient column selection
JP3408724B2 (ja) 半導体記憶装置
JP2001338495A (ja) 半導体記憶装置
JP3249912B2 (ja) 半導体記憶装置
JP2007306012A (ja) ダイナミックランダムアクセスメモリおよび半導体記憶装置
JP2001067876A (ja) 半導体記憶装置と半導体装置
US20050259500A1 (en) Semiconductor memory device and semiconductor device
JPH056654A (ja) 半導体集積回路装置

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20041020

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20041020

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20070413

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20070417

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070615

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20081111

A761 Written withdrawal of application

Free format text: JAPANESE INTERMEDIATE CODE: A761

Effective date: 20081202