JPH10133908A5 - - Google Patents
Info
- Publication number
- JPH10133908A5 JPH10133908A5 JP1996286604A JP28660496A JPH10133908A5 JP H10133908 A5 JPH10133908 A5 JP H10133908A5 JP 1996286604 A JP1996286604 A JP 1996286604A JP 28660496 A JP28660496 A JP 28660496A JP H10133908 A5 JPH10133908 A5 JP H10133908A5
- Authority
- JP
- Japan
- Prior art keywords
- control signal
- memory cell
- decoder
- control circuit
- cell array
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Priority Applications (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8286604A JPH10133908A (ja) | 1996-10-29 | 1996-10-29 | マイクロプロセッサ |
| TW086102492A TW332341B (en) | 1996-10-29 | 1997-03-03 | The microprocessor |
| KR1019970012630A KR19980032077A (ko) | 1996-10-29 | 1997-04-07 | 마이크로프로세서 |
| US08/848,168 US5983367A (en) | 1996-10-29 | 1997-04-29 | Microprocessor having a CPU and at least two memory cell arrays on the same semiconductor chip, including a shared sense amplifier |
| DE19721516A DE19721516C2 (de) | 1996-10-29 | 1997-05-22 | Mikroprozessor |
| CN97112951A CN1132111C (zh) | 1996-10-29 | 1997-06-09 | 微处理器 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8286604A JPH10133908A (ja) | 1996-10-29 | 1996-10-29 | マイクロプロセッサ |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH10133908A JPH10133908A (ja) | 1998-05-22 |
| JPH10133908A5 true JPH10133908A5 (enExample) | 2004-09-09 |
Family
ID=17706572
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8286604A Pending JPH10133908A (ja) | 1996-10-29 | 1996-10-29 | マイクロプロセッサ |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US5983367A (enExample) |
| JP (1) | JPH10133908A (enExample) |
| KR (1) | KR19980032077A (enExample) |
| CN (1) | CN1132111C (enExample) |
| DE (1) | DE19721516C2 (enExample) |
| TW (1) | TW332341B (enExample) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3219148B2 (ja) * | 1998-11-26 | 2001-10-15 | 日本電気株式会社 | データメモリ装置 |
| DE19903302B4 (de) * | 1999-01-28 | 2015-05-21 | Robert Bosch Gmbh | Verfahren und Vorrichtung zur Überprüfung der Funktion eines Rechners |
| EP1365325B1 (de) * | 2002-05-23 | 2011-01-19 | Infineon Technologies AG | Anordnung zur In-Circuit-Emulation einer programmgesteuerten Einheit |
| JP4310100B2 (ja) * | 2002-11-29 | 2009-08-05 | Okiセミコンダクタ株式会社 | フィールドメモリ |
| JP4115976B2 (ja) * | 2003-09-16 | 2008-07-09 | 株式会社東芝 | 半導体記憶装置 |
| RU2263951C2 (ru) * | 2004-02-02 | 2005-11-10 | Огородник Дмитрий Викторович | Способ обработки цифровых данных в запоминающем устройстве и запоминающее устройство для осуществления способа |
| US20070217247A1 (en) * | 2006-03-15 | 2007-09-20 | Zhanping Chen | Shared sense amplifier for fuse cell |
| US7602663B2 (en) * | 2006-12-22 | 2009-10-13 | Intel Corporation | Fuse cell array with redundancy features |
| US9423843B2 (en) * | 2012-09-21 | 2016-08-23 | Atmel Corporation | Processor maintaining reset-state after reset signal is suspended |
| US10120740B2 (en) * | 2016-03-22 | 2018-11-06 | Micron Technology, Inc. | Apparatus and methods for debugging on a memory device |
| US12376291B2 (en) | 2020-09-04 | 2025-07-29 | Changxin Memory Technologies, Inc. | Semiconductor device including shared sense amplification circuit group |
| CN114155896B (zh) * | 2020-09-04 | 2024-03-29 | 长鑫存储技术有限公司 | 半导体装置 |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5947658A (ja) * | 1982-09-13 | 1984-03-17 | Fujitsu Ltd | デ−タ処理装置の診断方式 |
| NL8901376A (nl) * | 1989-05-31 | 1990-12-17 | Philips Nv | Geintegreerde geheugenschakeling met een leesversterker. |
| US5123107A (en) * | 1989-06-20 | 1992-06-16 | Mensch Jr William D | Topography of CMOS microcomputer integrated circuit chip including core processor and memory, priority, and I/O interface circuitry coupled thereto |
| JPH04195546A (ja) * | 1990-11-28 | 1992-07-15 | Nec Corp | マイクロコンピュータのテストモード設定回路 |
| JPH04304532A (ja) * | 1991-04-02 | 1992-10-27 | Nec Corp | Rom化プログラムのデバッグ機能付コンピュータ |
| US5640542A (en) * | 1993-10-29 | 1997-06-17 | Intel Corporation | On-chip in-circuit-emulator memory mapping and breakpoint register modules |
| JPH07302254A (ja) * | 1994-05-06 | 1995-11-14 | Mitsubishi Electric Corp | マイクロコンピュータシステム |
| EP0715258B1 (en) * | 1994-07-22 | 1998-10-07 | Advanced Micro Devices, Inc. | Improved computer system |
| US5623673A (en) * | 1994-07-25 | 1997-04-22 | Advanced Micro Devices, Inc. | System management mode and in-circuit emulation memory mapping and locking method |
| JPH08273362A (ja) * | 1995-03-30 | 1996-10-18 | Nec Ic Microcomput Syst Ltd | 半導体記憶装置 |
| JPH0973778A (ja) * | 1995-09-01 | 1997-03-18 | Texas Instr Japan Ltd | アドレスアクセスパスのコントロール回路 |
| US5877780A (en) * | 1996-08-08 | 1999-03-02 | Lu; Hsuehchung Shelton | Semiconductor chip having multiple independent memory sections, at least one of which includes simultaneously accessible arrays |
| JPH10135424A (ja) * | 1996-11-01 | 1998-05-22 | Mitsubishi Electric Corp | 半導体集積回路装置 |
-
1996
- 1996-10-29 JP JP8286604A patent/JPH10133908A/ja active Pending
-
1997
- 1997-03-03 TW TW086102492A patent/TW332341B/zh active
- 1997-04-07 KR KR1019970012630A patent/KR19980032077A/ko not_active Ceased
- 1997-04-29 US US08/848,168 patent/US5983367A/en not_active Expired - Fee Related
- 1997-05-22 DE DE19721516A patent/DE19721516C2/de not_active Expired - Fee Related
- 1997-06-09 CN CN97112951A patent/CN1132111C/zh not_active Expired - Fee Related
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