JPH08293198A - 半導体記憶装置 - Google Patents
半導体記憶装置Info
- Publication number
- JPH08293198A JPH08293198A JP9646295A JP9646295A JPH08293198A JP H08293198 A JPH08293198 A JP H08293198A JP 9646295 A JP9646295 A JP 9646295A JP 9646295 A JP9646295 A JP 9646295A JP H08293198 A JPH08293198 A JP H08293198A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- control signal
- circuit
- output
- selection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 35
- 238000001514 detection method Methods 0.000 claims description 14
- 230000003111 delayed effect Effects 0.000 claims description 5
- 230000001934 delay Effects 0.000 abstract description 2
- 230000004913 activation Effects 0.000 abstract 2
- 230000003213 activating effect Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 23
- 238000000034 method Methods 0.000 description 6
- 208000006438 Waardenburg syndrome type 2 Diseases 0.000 description 5
- 208000008256 Waardenburg syndrome type 2B Diseases 0.000 description 5
- 230000000295 complement effect Effects 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 230000000415 inactivating effect Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Read Only Memory (AREA)
- Semiconductor Memories (AREA)
- Static Random-Access Memory (AREA)
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9646295A JPH08293198A (ja) | 1995-04-21 | 1995-04-21 | 半導体記憶装置 |
| EP96106135A EP0739014A3 (en) | 1995-04-21 | 1996-04-18 | Semiconductor memory device |
| TW085104682A TW297900B (OSRAM) | 1995-04-21 | 1996-04-19 | |
| US08/635,652 US5719820A (en) | 1995-04-21 | 1996-04-22 | Semiconductor memory device |
| KR1019960012908A KR100232614B1 (ko) | 1995-04-21 | 1996-04-22 | 반도체 메모리 장치 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9646295A JPH08293198A (ja) | 1995-04-21 | 1995-04-21 | 半導体記憶装置 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH08293198A true JPH08293198A (ja) | 1996-11-05 |
Family
ID=14165702
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9646295A Pending JPH08293198A (ja) | 1995-04-21 | 1995-04-21 | 半導体記憶装置 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US5719820A (OSRAM) |
| EP (1) | EP0739014A3 (OSRAM) |
| JP (1) | JPH08293198A (OSRAM) |
| KR (1) | KR100232614B1 (OSRAM) |
| TW (1) | TW297900B (OSRAM) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6975559B2 (en) * | 2002-05-31 | 2005-12-13 | Stmicroelectronics S.R.L. | Device and method for reading non-volatile memories having at least one pseudo-parallel communication interface |
| JP2007200464A (ja) * | 2006-01-27 | 2007-08-09 | Sanyo Electric Co Ltd | メモリ |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5715208A (en) * | 1995-09-29 | 1998-02-03 | Micron Technology, Inc. | Memory device and method for reading data therefrom |
| DE69627350D1 (de) * | 1996-11-27 | 2003-05-15 | St Microelectronics Srl | Verfahren und Vorrichtung zur Erzeugung eines Addressenübergangssynchronisationsignals (ATD) |
| US5970022A (en) * | 1997-03-21 | 1999-10-19 | Winbond Electronics Corporation | Semiconductor memory device with reduced read disturbance |
| KR100318439B1 (ko) * | 1999-06-30 | 2001-12-24 | 박종섭 | 워드라인 억세스 타임을 개선하기 위한 방법 및 그를 위한 반도체 메모리 장치 |
| US6788614B2 (en) * | 2001-06-14 | 2004-09-07 | Micron Technology, Inc. | Semiconductor memory with wordline timing |
| KR100889311B1 (ko) * | 2007-02-23 | 2009-03-18 | 주식회사 하이닉스반도체 | 비트라인 감지증폭기를 포함하는 반도체메모리소자 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61126685A (ja) * | 1984-11-26 | 1986-06-14 | Hitachi Ltd | 半導体集積回路 |
| JPS61150194A (ja) * | 1984-12-25 | 1986-07-08 | Nec Corp | リ−ド・オンリ・メモリ |
| JPS62293597A (ja) * | 1986-06-12 | 1987-12-21 | Matsushita Electric Ind Co Ltd | 半導体記憶装置 |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58199496A (ja) * | 1982-05-14 | 1983-11-19 | Hitachi Ltd | 欠陥救済回路を有する半導体メモリ |
| JPH0812756B2 (ja) * | 1987-06-22 | 1996-02-07 | 松下電子工業株式会社 | スタチックram回路 |
| JP2753705B2 (ja) * | 1987-10-26 | 1998-05-20 | 株式会社日立製作所 | 半導体記憶装置 |
| JPH065100A (ja) * | 1992-06-18 | 1994-01-14 | Toshiba Corp | 半導体記憶装置 |
| JPH07220487A (ja) * | 1994-01-27 | 1995-08-18 | Toshiba Corp | 不揮発性メモリ回路 |
-
1995
- 1995-04-21 JP JP9646295A patent/JPH08293198A/ja active Pending
-
1996
- 1996-04-18 EP EP96106135A patent/EP0739014A3/en not_active Withdrawn
- 1996-04-19 TW TW085104682A patent/TW297900B/zh not_active IP Right Cessation
- 1996-04-22 KR KR1019960012908A patent/KR100232614B1/ko not_active Expired - Fee Related
- 1996-04-22 US US08/635,652 patent/US5719820A/en not_active Expired - Lifetime
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61126685A (ja) * | 1984-11-26 | 1986-06-14 | Hitachi Ltd | 半導体集積回路 |
| JPS61150194A (ja) * | 1984-12-25 | 1986-07-08 | Nec Corp | リ−ド・オンリ・メモリ |
| JPS62293597A (ja) * | 1986-06-12 | 1987-12-21 | Matsushita Electric Ind Co Ltd | 半導体記憶装置 |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6975559B2 (en) * | 2002-05-31 | 2005-12-13 | Stmicroelectronics S.R.L. | Device and method for reading non-volatile memories having at least one pseudo-parallel communication interface |
| JP2007200464A (ja) * | 2006-01-27 | 2007-08-09 | Sanyo Electric Co Ltd | メモリ |
Also Published As
| Publication number | Publication date |
|---|---|
| KR100232614B1 (ko) | 1999-12-01 |
| US5719820A (en) | 1998-02-17 |
| KR960039001A (ko) | 1996-11-21 |
| EP0739014A2 (en) | 1996-10-23 |
| TW297900B (OSRAM) | 1997-02-11 |
| EP0739014A3 (en) | 1998-08-05 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 19970819 |