JPH0774374A - Thin film diode and manufacture thereof - Google Patents

Abstract

PURPOSE:To enable a thin film diode to be lessened in capacitance and easily manufactured by a method wherein a semiconductor layer is provided onto a first electrode layer deposited on a substrate, a second electrode layer is provided onto a buffer layer deposited on the semiconductor layer, and the semiconductor layer and the buffer layer are patterned into nearly the same shape. CONSTITUTION:A buffer layer 553 is provided between a semiconductor layer 543 deposited on a first electrode layer 413 and a second electrode layer 463. For instance, provided that the second electrode layer 463 is formed of Al, and the semiconductor layer 543 is formed of amorphous Si, the buffer layer 553 of Cr is formed as thick as 100nm so as to effectively prevent mutual diffusion in an after process. At this point, the buffer layer 553 is patterned after the same pattern with the semiconductor layer 543, so that only a film forming process through which the buffer layer 553 is formed is additionally provided to realize a thin film diode of this constitution without changing processes much.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a thin film diode used for driving a liquid crystal display panel and the like, and a manufacturing method for forming this structure.

[0002]

2. Description of the Related Art Liquid crystal display panels are widely used, and for driving these liquid crystal display panels, an active matrix using thin film active elements has recently been considered promising as a high density display device.

The active element includes a thin film transistor (TFT) and a thin film diode, and in particular, a thin film diode using amorphous silicon (a-Si) is connected in parallel (diode ring connection) and used as a non-linear resistance. The means is a previous application (Japanese Patent Application No. 57-167945).
As shown in, it is extremely promising because of its ease of manufacture, display quality, and expandability.

Although there are some requirements for the thin film diode used for such an application, the ease of manufacture and the low device capacitance are particularly important.

FIG. 1 is a circuit diagram showing a known equivalent circuit of a non-linear resistance by a diode ring connection.

In order to realize a circuit in which the diodes shown in FIG. 1 are reversely connected in parallel with a thin film diode,
As described in the previous application (Japanese Patent Application No. 57-167945), it is preferable to use the structure shown in FIGS. 2 (a) and 2 (b).

FIG. 2 (a) is a plan view showing a prior art thin film diode ring, and FIG. 2 (b) is shown in FIG.
It is sectional drawing which shows the cross section in the AA'-A "line of (a).

The pattern 1 shows the lower first electrode layer 6,
The pattern 2 indicates the upper second electrode layer 8, the broken line pattern 3 indicates the semiconductor layer 9 that serves as the diode main portion, and the pattern 4
Indicates contact holes formed in the interlayer insulating film 7 that insulates the first electrode layer 6 and the second electrode layer 8 from each other.

Then, a non-linear element 10 composed of the first electrode layer 6, the semiconductor layer 9, the interlayer insulating film 7 and the second electrode layer 8 is formed on the substrate 5. In order to form the non-linear element 10 in this manner, independent four-layer patterns are required.

[0010]

Consider the manufacturing cost of the liquid crystal display panel. Active with active elements
The matrix and the passive matrix which does not use the active matrix are superior in the former in display quality and multi-segmentation, and in the latter in manufacturing cost.

However, in recent years, the display quality of the passive matrix has been remarkably improved, and the application of the active matrix has started to be applied to portable televisions. On the other hand, the active matrix is practically used only in some fields because the manufacturing cost is too high. It has not been.

Although the non-linear resistance type active matrix is superior in cost to the TFT type, the structure of FIG. 2 still cannot compete with the passive matrix.

The difficulty in manufacturing the non-linear element 10 shown in FIG. 2 lies in the step of patterning the four patterns 1 to 4 precisely at their respective positions.

If this pattern matching is not accurate, the element quality will vary and the display quality will deteriorate.

Therefore, a thin film diode having a structure in which the number of patterns is reduced and the mutual alignment accuracy is not required and a manufacturing method for forming this structure is desired.

It is an object of the present invention to solve the conventional drawbacks and to propose a thin film diode having a low capacity and easily manufactured, and a manufacturing method thereof.

[0017]

In order to achieve the above object, the thin film diode of the present invention and the method for manufacturing the same adopt the following means.

The thin-film diode of the present invention comprises a first electrode layer provided on a substrate, a semiconductor layer provided on the first electrode layer, a buffer layer provided on the semiconductor layer, and a second layer provided on the buffer layer. An electrode layer is provided, and the semiconductor layer and the buffer layer have substantially the same pattern shape.

A method of manufacturing a thin film diode according to the present invention comprises a step of forming a first electrode layer on the entire surface of a substrate and patterning the first electrode layer with a first pattern, and a semiconductor layer and a buffer on the entire surface. Forming a layer, patterning the buffer layer and the semiconductor layer with a second pattern, and forming a second electrode layer on the entire surface and patterning the second electrode layer with a third pattern. It is characterized by

[0020]

In the present invention, it is possible to form a pattern with three photomasks, and the high resistance non-single crystal semiconductor layer and the second electrode layer are formed in the lead-out portion of the second electrode layer and the semiconductor layer. Since they come into contact, the problem of short circuit can be avoided.

[0021]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The structure of a thin film diode of the present invention and a manufacturing method for forming this structure will be described in detail below with reference to the drawings.

FIG. 3A is a plan view showing a thin film diode ring according to the first embodiment of the present invention.
FIG. 3B is a sectional view showing a section taken along line AA ′ in FIG.

As shown in FIG. 3, the first electrode layers 14, 2
The semiconductor layer 15 on the semiconductor layer 15 and the second semiconductor layer 15 is formed on the semiconductor layer 15.
The electrode layer 16 is provided.

The area where the first electrode layer 14, the semiconductor layer 15 and the second electrode layer 16 are provided is the thin film diode 2.
3 and 26. The regions indicated by 24 and 25 are contact regions.

In the first embodiment of the present invention, only three mask patterns are used in the manufacturing process.

That is, the first pattern 11 used when forming the first electrode layers 14 and 20 and the semiconductor layer 1
A second pattern 13 used when forming the pattern 5;
And a third pattern 12 used when forming the second electrode layer 16 in a pattern.

The feature of the first embodiment of the present invention is that the second pattern 13, that is, the thin film diodes 23 and 26, is
Is larger than the overlapping portion of the pattern 11 and the third pattern 12.

A thin film diode formed by sequentially patterning the first electrode layers 14 and 20, the semiconductor layer 15, and the second electrode layer 16 on the substrate by using such three patterns is shown in FIG. As shown in the sectional view of (b), the second electrode layer 1
In the region of the lead-out portion 27 for pulling out 6 from above the thin film diode, the pattern widths are arrows 17, 18 in the order of the first electrode layers 14, 20, the semiconductor layer 15, and the second electrode layer 16,
19 is the dimension shown, and arrow 19 is the largest and arrow 1
7 is the smallest.

In this structure, in the electrode lead-out portion 27, the first electrode layer 14 and the second electrode layer 16 are separated by the semiconductor layer 15, so that the interlayer insulating film 7 in FIG. Has become.

As described above, in the first embodiment of the present invention, the number of patterns and the number of layers are reduced and the manufacturing process is greatly simplified as compared with FIG. 2 showing the prior art. There is.

Furthermore, in the first embodiment of the present invention, the weight of the first electrode layer 14 and the second electrode layer 16 is only at the intersections of the respective patterns, and the interlayer insulating film 7 is used. Compared to Fig. 2, the area is about 1 / when using the same pattern rule.
It has been reduced to 6. As a result, the capacitance of the thin film diode element is significantly reduced.

FIGS. 4 (a) and 4 (b) show a thin film diode according to the second embodiment of the present invention. FIG. 4 (a) is a plan view and FIG. 4 (b) is for explaining a manufacturing process. Figure 4
It is sectional drawing which shows the cross section in the AA 'line of (a), and the cross section in a BB' line.

In FIG. 4B, the top is the first step,
The bottom is the last step, and the next step is shown as it goes down. Further, in each step, the drawing on the left side shows the section AA 'in FIG. 4A, and the drawing on the right side shows the section BB' in FIG. 4A.

The first pattern 11, the second pattern 13, and the third pattern 12 shown in FIG. 4 are the same as those in FIG.

The difference between the second embodiment and the first embodiment is that the semiconductor layer 33 is left only in the shaded intersections 28 and 29.

The manufacturing process will be described. First, the first electrode layers 30, 31, 32 are patterned on the substrate 5 by the first pattern 11. Then, the semiconductor layers 33 and 34 are patterned by the second pattern 13. Further, the second electrode layer 35,
By forming 36 with the third pattern 12, the thin film diodes 23 and 26 as shown in FIG. 3 are completed.

In the second embodiment of the present invention, the semiconductor layers 33 and 34 are patterned again using the second electrode layers 35 and 36 as masks.

Through the steps described above, a semiconductor layer can be formed at the overlapping portion of the second pattern 13 and the third pattern 12, as shown by the crossing portions 28 and 29.

The second embodiment of the present invention has the same effect as that of the first embodiment, and yet another effect is that the area of the semiconductor layer is further reduced as compared with the first embodiment. We have realized a reduction in the capacitance of thin film diodes.

Since the self-alignment technique is used to reduce the area of the semiconductor layer, only the etching process is added to the manufacturing process, and the film formation process, the photosensitive resin formation, and the exposure process using the photomask are performed. It is not necessary to use a photolithography process for development processing.

The first and second electrode layers in the first and second embodiments described above are made of Al, Cr,
Metallic materials such as Mo and Au, or doped S
A semiconductor material such as i or Ge, a transparent electrode material such as In ₂ O ₃ or SnO ₂ , or a composite layer of the above-mentioned materials can be applied.

The semiconductor layer is made of amorphous Si, SiNx, SiC.
x, SiGex, SiSnx, etc. are applicable, and the structure of the semiconductor layer is PIN type, NIP type, NI from the bottom.
Type, PI type, IN type, IP type, I type and the like are applicable.

FIG. 5 is a sectional view showing a third embodiment of the present invention in which NIP type amorphous Si is used as a semiconductor layer.

An amorphous Si layer 42 doped with a first conductivity type (N or P) impurity, a non-doped amorphous Si layer 43, and a first electrode layer 41 made of In ₂ O ₃ are provided. Two
An amorphous Si layer 44 doped with a conductivity type (P or N) impurity is provided.

Then, the amorphous Si layer 42 doped with the impurities of the first conductivity type and the non-doped amorphous Si layer 43.
And a second conductivity type impurity-doped amorphous Si layer 44
And constitute the semiconductor layer 45.

The semiconductor layer 45 having the three-layer structure is simultaneously patterned. Further, the second electrode layer 46 is provided over the semiconductor layer 45. This second electrode layer 46 is A
1 or Cr.

The third embodiment of the present invention is devised so that the first electrode layer 41 and the second electrode layer 46 are not short-circuited through the first conductivity type impurity-doped amorphous Si layer 42. is necessary.

This is because the etching rate of amorphous Si is I
The N-type is much faster than the P-type, and the voids 47 and 48 are provided by under-etching the amorphous Si layer 42 doped with N-type impurities in the patterning process of the semiconductor layer 45. It prevents the occurrence of short circuit.

Further, the ratio W / L of the length L to the width W (not shown) of the lead portion is made sufficiently small, and the thickness d ₁ of the amorphous Si layer 42 doped with the first conductivity type impurity (not shown). It is possible to effectively avoid the occurrence of a short circuit by reducing the thickness of (d).

For example, the conductivity ρ ₁ of the N-type amorphous Si layer 42 is set to 10 ⁻⁴ (Ωcm) ^−1, and the storage capacitance C of the display element is set.
If s is 1 PF and the holding time is 10 msec, d
₁ = about 10 nm and W / L = about 1-5.

FIG. 6 is a sectional view showing a fourth embodiment of the present invention. The lower electrode layer 49 made of a metal material or a transparent electrode layer material and the impurity-doped layer 50 made of a non-single-crystal silicon material and having a low resistance due to the impurity doping of the first conductivity type (N or P) The electrode layer 54 is formed. Thus, the first electrode layer 54 is a composite layer.

The non-doped Si layer 5 is formed on the first electrode layer 54.
1 and a doped Si layer 52 doped with a second conductivity type (P or N) impurity. The semiconductor layer 53, which is the main part of the thin film diode, includes a non-doped Si layer 51 and a doped Si
It consists of two layers, layer 52.

Further, a second electrode layer 46 is provided on this semiconductor layer 53.

The thin film diode includes, for example, an N-type doped Si layer 50 forming the first electrode layer 54 and the semiconductor layer 5.
3 of the non-doped layer 51 (I-type layer) and the doped Si layer 52 doped with P-type impurities (PIN).
Mold).

The feature of the fifth embodiment of the present invention is that the first electrode layer 54 has a two-layer structure including a lower electrode layer 49 made of a metal or a transparent electrode and an impurity doped layer 50 made of a semiconductor material. That is the point.

Thus, while realizing the NIP type structure, the first electrode layer 54 and the second electrode layer 46 are insulated by the high-resistance non-doped Si layer 51, and the problem of short circuit can be avoided.

FIG. 7 is a sectional view showing the fifth embodiment of the present invention. The first electrode layer 411 is, for example, Mo, and the semiconductor layer 531 includes the non-doped Si layer 511 and the N-type Si layer 5.
21 and the second electrode layer 461 is an N-type Si layer 52.
Al, Cr, etc. which have an ohmic contact with 1.

The feature of the fifth embodiment of the present invention is that the thin film diode is formed by the Schottky barrier between the first electrode layer 411 and the semiconductor layer 531.

Also in the fifth embodiment of the present invention, the first electrode layer 4 is used.
11 and the second electrode layer 461 are separated by a high resistance non-doped Si layer 511 at the lead portion. Therefore, a thin film diode having good characteristics can be obtained without causing a short circuit problem.

FIG. 8 is a sectional view showing a thin film diode according to the sixth embodiment of the present invention. The first electrode layer 412 is made of, for example, Mg, and the semiconductor layer 542 is made of non-doped S.
The second electrode layer 462 is made of Mo, for example.

The feature of the sixth embodiment of the present invention is that the first electrode layer 412 and the semiconductor layer 542 are in ohmic contact, and the second electrode layer 462 and the semiconductor layer 542 are in Schottky contact. That is the point.

The sixth embodiment of the present invention also solves the problem of short circuit and has a simple structure. Furthermore, the sixth
In the embodiment, since the Schottky barrier is formed in the final step, there is no heating step such as another film forming step and a good barrier can be obtained.

Contrary to FIG. 8, a Schottky contact is made between the first electrode layer 412 and the semiconductor layer 542, and the semiconductor layer 542 and the second layer are connected to each other.
The problem of short circuit can be avoided by making ohmic contact between the electrode layers 462.

FIG. 9 is a sectional view showing a thin film diode according to the seventh embodiment of the present invention. A buffer layer 553 is provided between the semiconductor layer 543 provided over the first electrode layer 413 and the second electrode layer 463.

For example, when the second electrode 463 is Al and the semiconductor layer 543 is amorphous Si, it is effective to use Cr as the buffer layer 553 with a film thickness of about 100 nm in order to prevent mutual diffusion in a subsequent process. Is.

In the seventh embodiment of the present invention, the buffer layer 55
3 is realized by patterning with the same pattern as the semiconductor layer 543, only increasing the film forming process for forming the buffer layer 553, and not changing the process.

The present invention is effective even if an additional structure such as a buffer layer is added as in the seventh embodiment of the present invention.

Furthermore, structures other than those shown in FIGS.
Those having the structures clarified in the first and second embodiments shown in FIG. 4 are included in the present invention.

[0069]

As is apparent from the above description, the present invention does not require an interlayer insulating film and can realize a thin film diode having a good characteristic with a small number of patterns and a small number of layers and less leakage between electrodes. . Further, by using the self-alignment technique, the element area and the element capacitance can be significantly reduced, and a thin film diode extremely suitable as a switching element for a display panel using liquid crystal or the like or a non-linear element can be provided. it can.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an equivalent circuit of a non-linear element with a diode ring connection.

FIG. 2 is a view showing a ring-connected thin film diode according to the prior art.

FIG. 3 is a view showing a thin film diode according to an embodiment of the present invention.

FIG. 4 is a view showing a thin film diode according to an embodiment of the present invention.

FIG. 5 is a cross-sectional view showing a thin film diode in an example of the present invention.

FIG. 6 is a cross-sectional view showing a thin film diode in an example of the present invention.

FIG. 7 is a cross-sectional view showing a thin film diode in an example of the present invention.

FIG. 8 is a cross-sectional view showing a thin film diode in an example of the present invention.

FIG. 9 is a cross-sectional view showing a thin film diode in an example of the present invention.

[Explanation of symbols]

 413 first electrode layer 462 second electrode layer 553 semiconductor layer 553 buffer layer

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Etsuo Yamamoto 840 Takeno, Shimotomi, Tokorozawa, Saitama Prefecture, CITIZEN WATCH CO., LTD.Technical Research Laboratory (72) Kazuaki Sorimachi, Taketomo, Tokorozawa, Saitama 840 Citizen Watch Co., Ltd. Technical Research Laboratory (72) Inventor Hiroshi Tanabe Tokorozawa, Saitama Prefecture Shimotomi Takeno 840 Address Citizen Watch Co., Ltd. Technical Research Center

Claims (2)

[Claims] 1. A first electrode layer provided on a substrate, a semiconductor layer provided on the first electrode layer, a buffer layer provided on the semiconductor layer, and a second electrode layer provided on the buffer layer. A thin film diode characterized in that the semiconductor layer and the buffer layer have substantially the same pattern shape. 2. A first electrode layer is formed on the entire surface of the substrate,
Patterning the first electrode layer with a first pattern; forming a semiconductor layer and a buffer layer on the entire surface; patterning the buffer layer and the semiconductor layer with a second pattern; and a second electrode on the entire surface Form a layer and use a third pattern to make a second
And a step of patterning the electrode layer of 1.