JPH07326192A - 半導体記憶装置 - Google Patents
半導体記憶装置Info
- Publication number
- JPH07326192A JPH07326192A JP6119074A JP11907494A JPH07326192A JP H07326192 A JPH07326192 A JP H07326192A JP 6119074 A JP6119074 A JP 6119074A JP 11907494 A JP11907494 A JP 11907494A JP H07326192 A JPH07326192 A JP H07326192A
- Authority
- JP
- Japan
- Prior art keywords
- line pair
- bit line
- line
- amplification
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 20
- 230000003321 amplification Effects 0.000 claims abstract description 146
- 238000003199 nucleic acid amplification method Methods 0.000 claims abstract description 146
- 239000000758 substrate Substances 0.000 claims description 4
- 238000009792 diffusion process Methods 0.000 claims description 2
- 230000007704 transition Effects 0.000 abstract description 6
- 238000000034 method Methods 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 21
- 230000000694 effects Effects 0.000 description 10
- 230000003213 activating effect Effects 0.000 description 6
- 230000008859 change Effects 0.000 description 6
- 238000004904 shortening Methods 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 4
- 238000003491 array Methods 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 3
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 230000003111 delayed effect Effects 0.000 description 3
- 238000007667 floating Methods 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000002457 bidirectional effect Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000007562 laser obscuration time method Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1048—Data bus control circuits, e.g. precharging, presetting, equalising
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Databases & Information Systems (AREA)
- Dram (AREA)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6119074A JPH07326192A (ja) | 1994-05-31 | 1994-05-31 | 半導体記憶装置 |
KR1019950014089A KR100207970B1 (ko) | 1994-05-31 | 1995-05-31 | 반도체 기억장치 |
TW084106074A TW276360B (en, 2012) | 1994-05-31 | 1995-06-14 | |
US08/768,556 US5757707A (en) | 1994-05-31 | 1996-12-18 | Semiconductor memory device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6119074A JPH07326192A (ja) | 1994-05-31 | 1994-05-31 | 半導体記憶装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH07326192A true JPH07326192A (ja) | 1995-12-12 |
Family
ID=14752242
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6119074A Pending JPH07326192A (ja) | 1994-05-31 | 1994-05-31 | 半導体記憶装置 |
Country Status (4)
Country | Link |
---|---|
US (1) | US5757707A (en, 2012) |
JP (1) | JPH07326192A (en, 2012) |
KR (1) | KR100207970B1 (en, 2012) |
TW (1) | TW276360B (en, 2012) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010157919A (ja) * | 2008-12-26 | 2010-07-15 | Fujitsu Semiconductor Ltd | 半導体集積回路,データ転送システムおよびデータ転送方法 |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3085241B2 (ja) * | 1997-04-11 | 2000-09-04 | 日本電気株式会社 | 半導体記憶装置 |
JPH10308100A (ja) * | 1997-05-06 | 1998-11-17 | Mitsubishi Electric Corp | 半導体記憶装置 |
JP4226686B2 (ja) * | 1998-05-07 | 2009-02-18 | 株式会社東芝 | 半導体メモリシステム及び半導体メモリのアクセス制御方法及び半導体メモリ |
US6275435B1 (en) | 1999-03-31 | 2001-08-14 | Vanguard International Semiconductor Corp. | Bi-directional sense amplifier stage for memory datapath |
US6115308A (en) * | 1999-06-17 | 2000-09-05 | International Business Machines Corporation | Sense amplifier and method of using the same with pipelined read, restore and write operations |
GB2379546A (en) * | 2000-07-07 | 2003-03-12 | Mosaid Technologies Inc | A method and apparatus for accelerating signal equalization between a pair of signal lines |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0646513B2 (ja) * | 1989-07-12 | 1994-06-15 | 株式会社東芝 | 半導体記憶装置のデータ読出回路 |
EP0454162B1 (en) * | 1990-04-27 | 1996-09-25 | Nec Corporation | Semiconductor memory device |
JPH04186593A (ja) * | 1990-11-21 | 1992-07-03 | Mitsubishi Electric Corp | 半導体記憶装置 |
JP2672721B2 (ja) * | 1991-05-27 | 1997-11-05 | 株式会社東芝 | センスアンプ回路 |
JP2876830B2 (ja) * | 1991-06-27 | 1999-03-31 | 日本電気株式会社 | 半導体記憶装置 |
JPH0612604A (ja) * | 1992-06-29 | 1994-01-21 | Matsushita Electric Ind Co Ltd | 磁界発生装置 |
-
1994
- 1994-05-31 JP JP6119074A patent/JPH07326192A/ja active Pending
-
1995
- 1995-05-31 KR KR1019950014089A patent/KR100207970B1/ko not_active Expired - Fee Related
- 1995-06-14 TW TW084106074A patent/TW276360B/zh active
-
1996
- 1996-12-18 US US08/768,556 patent/US5757707A/en not_active Expired - Lifetime
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010157919A (ja) * | 2008-12-26 | 2010-07-15 | Fujitsu Semiconductor Ltd | 半導体集積回路,データ転送システムおよびデータ転送方法 |
Also Published As
Publication number | Publication date |
---|---|
TW276360B (en, 2012) | 1996-05-21 |
US5757707A (en) | 1998-05-26 |
KR950034793A (ko) | 1995-12-28 |
KR100207970B1 (ko) | 1999-07-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20040720 |