JPH07249645A - 基板上での半導体の取り付け方法 - Google Patents

基板上での半導体の取り付け方法

Info

Publication number
JPH07249645A
JPH07249645A JP5024868A JP2486893A JPH07249645A JP H07249645 A JPH07249645 A JP H07249645A JP 5024868 A JP5024868 A JP 5024868A JP 2486893 A JP2486893 A JP 2486893A JP H07249645 A JPH07249645 A JP H07249645A
Authority
JP
Japan
Prior art keywords
substrate
semiconductor
metal
bonded
wire
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5024868A
Other languages
English (en)
Japanese (ja)
Inventor
Franz Kaussen
カウセン フランツ
Martin Figura
フイグーラ マルチン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
EUPEC GmbH
Original Assignee
EUPEC GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by EUPEC GmbH filed Critical EUPEC GmbH
Publication of JPH07249645A publication Critical patent/JPH07249645A/ja
Pending legal-status Critical Current

Links

Classifications

    • H10W70/68
    • H10W72/07327
    • H10W72/07331
    • H10W72/07336
    • H10W72/07337
    • H10W72/352
    • H10W72/385
    • H10W90/734
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49133Assembling to base an electrical component, e.g., capacitor, etc. with component orienting
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49144Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion

Landscapes

  • Die Bonding (AREA)
JP5024868A 1992-01-24 1993-01-20 基板上での半導体の取り付け方法 Pending JPH07249645A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE4201931.1 1992-01-24
DE4201931A DE4201931C1 (enExample) 1992-01-24 1992-01-24

Publications (1)

Publication Number Publication Date
JPH07249645A true JPH07249645A (ja) 1995-09-26

Family

ID=6450189

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5024868A Pending JPH07249645A (ja) 1992-01-24 1993-01-20 基板上での半導体の取り付け方法

Country Status (4)

Country Link
US (1) US5310701A (enExample)
JP (1) JPH07249645A (enExample)
DE (1) DE4201931C1 (enExample)
IT (1) IT1263769B (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07249723A (ja) * 1994-03-11 1995-09-26 Fujitsu Miyagi Electron:Kk 半導体装置の実装構造及び半導体装置の実装方法及びリードフレーム
US5601675A (en) * 1994-12-06 1997-02-11 International Business Machines Corporation Reworkable electronic apparatus having a fusible layer for adhesively attached components, and method therefor
DE19510003A1 (de) * 1995-03-22 1996-09-26 Inst Mikrotechnik Mainz Gmbh Verfahren zum hochgenauen Anordnen mehrerer Plättchen auf einem Träger sowie ein Träger für die Durchführung des Verfahrens
US5917245A (en) * 1995-12-26 1999-06-29 Mitsubishi Electric Corp. Semiconductor device with brazing mount
JP2992873B2 (ja) * 1995-12-26 1999-12-20 サンケン電気株式会社 半導体装置
US5891756A (en) 1997-06-27 1999-04-06 Delco Electronics Corporation Process for converting a wire bond pad to a flip chip solder bump pad and pad formed thereby
FR2787920B1 (fr) * 1998-12-28 2003-10-17 Alstom Procede d'assemblage d'une puce a un element de circuit par brasage
DE102005047055A1 (de) * 2005-09-30 2007-04-05 Infineon Technologies Austria Ag Ansteuerschaltung mit einem Transformator für ein Halbleiterschaltelement
DE112014006446B4 (de) 2014-03-07 2021-08-05 Mitsubishi Electric Corporation Halbleiteranordnung

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3370203A (en) * 1965-07-19 1968-02-20 United Aircraft Corp Integrated circuit modules
US3715633A (en) * 1971-07-15 1973-02-06 J Nier Semiconductor unit with integrated circuit
US3962669A (en) * 1974-07-24 1976-06-08 Tyco Laboratories, Inc. Electrical contact structure for semiconductor body
DE2814642A1 (de) * 1978-04-05 1979-10-18 Bosch Gmbh Robert Verfahren zum befestigen mindestens eines halbleiterkoerpers auf einen traeger
FR2506075A1 (fr) * 1981-05-18 1982-11-19 Radiotechnique Compelec Procede d'assemblage d'un dispositif semi-conducteur et de son boitier de protection
DE3401404A1 (de) * 1984-01-17 1985-07-25 Robert Bosch Gmbh, 7000 Stuttgart Halbleiterbauelement
US4949148A (en) * 1989-01-11 1990-08-14 Bartelink Dirk J Self-aligning integrated circuit assembly

Also Published As

Publication number Publication date
IT1263769B (it) 1996-08-29
ITMI930071A1 (it) 1994-07-19
DE4201931C1 (enExample) 1993-05-27
US5310701A (en) 1994-05-10
ITMI930071A0 (it) 1993-01-19

Similar Documents

Publication Publication Date Title
US5629563A (en) Component stacking in multi-chip semiconductor packages
JP2001508240A (ja) 能動半導体部品および受動部品を備えた回路装置を有するパワーモジュールならびにその製造方法
JPH07254759A (ja) パワー混成集積回路装置
JPH07249645A (ja) 基板上での半導体の取り付け方法
JPS59121890A (ja) セラミツクスと金属との接合体
GB2165704A (en) Heat dissipation for electronic components
JPH06216526A (ja) 薄膜多層配線基板
JP2521624Y2 (ja) 半導体装置
JP3463790B2 (ja) 配線基板
JP3036291B2 (ja) 半導体装置の実装構造
JPH04287952A (ja) 複合絶縁基板およびそれを用いた半導体装置
JPS61121489A (ja) 基板製造用Cu配線シ−ト
JP3808357B2 (ja) 配線基板
JPS6370545A (ja) 半導体パツケ−ジ
JP2761995B2 (ja) 高放熱性集積回路パッケージ
JP2710893B2 (ja) リード付き電子部品
JPH08264680A (ja) 半導体実装構造体
JP2515671Y2 (ja) 半導体素子収納用パッケージ
JP2822446B2 (ja) 混成集積回路装置
JPS62169461A (ja) 半導体装置
JP2000022021A (ja) ベアチップ基板分離構造半導体モジュール
JPH0756886B2 (ja) 半導体パッケージの製造方法
JPH0563130A (ja) リードフレームとその製造方法並びに半導体パツケージ
JPH0964232A (ja) セラミックパッケージ
JP2001156215A (ja) セラミックパッケージ