JPH07170163A - 変換器回路 - Google Patents

変換器回路

Info

Publication number
JPH07170163A
JPH07170163A JP6213544A JP21354494A JPH07170163A JP H07170163 A JPH07170163 A JP H07170163A JP 6213544 A JP6213544 A JP 6213544A JP 21354494 A JP21354494 A JP 21354494A JP H07170163 A JPH07170163 A JP H07170163A
Authority
JP
Japan
Prior art keywords
signal line
coupled
transistor
voltage
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP6213544A
Other languages
English (en)
Japanese (ja)
Inventor
Kenneth Ho
ケニス・ホゥ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of JPH07170163A publication Critical patent/JPH07170163A/ja
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/086—Emitter coupled logic
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
    • H03K19/018528—Interface arrangements of complementary type, e.g. CMOS with at least one differential stage
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00369—Modifications for compensating variations of temperature, supply voltage or other physical parameters
    • H03K19/00384—Modifications for compensating variations of temperature, supply voltage or other physical parameters in field effect transistor circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
  • Pulse Circuits (AREA)
  • Dram (AREA)
JP6213544A 1993-09-08 1994-09-07 変換器回路 Withdrawn JPH07170163A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11806793A 1993-09-08 1993-09-08
US118067 1993-09-08

Publications (1)

Publication Number Publication Date
JPH07170163A true JPH07170163A (ja) 1995-07-04

Family

ID=22376340

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6213544A Withdrawn JPH07170163A (ja) 1993-09-08 1994-09-07 変換器回路

Country Status (5)

Country Link
US (1) US5469097A (enExample)
EP (1) EP0642226A3 (enExample)
JP (1) JPH07170163A (enExample)
KR (1) KR950010367A (enExample)
TW (1) TW307064B (enExample)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ATE230296T1 (de) * 1996-01-24 2003-01-15 Mitsubishi Materials Corp Pflasterstein zur reinigung von nox
JP2783236B2 (ja) * 1996-01-31 1998-08-06 日本電気株式会社 レベル変換回路
KR970069274A (ko) * 1996-04-18 1997-11-07 황선두 원적외선방사 수지몰탈조성물
KR100242599B1 (ko) * 1997-01-24 2000-02-01 최순호 고성능 투수 콘크리트
KR100266876B1 (ko) * 1997-01-24 2000-09-15 서정숙 투수 콘크리트
KR100241719B1 (ko) * 1997-01-24 2000-02-01 김록상 기포 투수 콘크리트
GB9708865D0 (en) * 1997-04-30 1997-06-25 Phoenix Vlsi Consultants Ltd ECL-CMOS converter
KR100248892B1 (ko) * 1997-07-23 2000-03-15 정숭렬 쇄석매스틱 아스팔트 혼합물 및 그포장공법
CA2233527C (en) * 1998-03-30 2002-01-22 Mitel Semiconductor Ab Pulse amplifier with low-duty cycle errors
US6020762A (en) * 1998-06-26 2000-02-01 Micron Technology, Inc. Digital voltage translator and its method of operation
US6617895B2 (en) * 2001-03-30 2003-09-09 Intel Corporation Method and device for symmetrical slew rate calibration
US6535017B1 (en) * 2001-12-20 2003-03-18 Honeywell International Inc. CMOS ECL input buffer
US7893730B2 (en) * 2008-07-29 2011-02-22 Silicon Mitus, Inc. Level shifter and driving circuit including the same
KR20190094054A (ko) 2018-02-02 2019-08-12 황현석 폐합판을 이용한 팔레트 제조방법 및 그 제조방법

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1277089A (en) * 1969-05-23 1972-06-07 Mullard Ltd Interface transmitter
US4499609A (en) * 1980-08-27 1985-02-12 International Telephone And Telegraph Corporation Symmetrically clamped fiber optic receiver
JPH0773205B2 (ja) * 1983-12-20 1995-08-02 株式会社日立製作所 レベル変換回路
JPS60182207A (ja) * 1984-02-29 1985-09-17 Fujitsu Ltd 差動増幅回路
US4647799A (en) * 1984-06-29 1987-03-03 Advanced Micro Devices, Inc. Full and fractional swing with adjustable high level ECL gate using a single current source
JP2559032B2 (ja) * 1986-09-13 1996-11-27 富士通株式会社 差動増幅回路
US4849659A (en) * 1987-12-15 1989-07-18 North American Philips Corporation, Signetics Division Emitter-coupled logic circuit with three-state capability
US4812676A (en) * 1987-12-21 1989-03-14 Digital Equipment Corporation Current mode logic switching circuit having a Schmitt trigger
US5248909A (en) * 1990-01-09 1993-09-28 Fujitsu Limited ECL-TO-GaAs level converting circuit
US5059829A (en) * 1990-09-04 1991-10-22 Motorola, Inc. Logic level shifting circuit with minimal delay
US5065055A (en) * 1990-12-20 1991-11-12 Sun Microsystems, Inc. Method and apparatus for high-speed bi-CMOS differential amplifier with controlled output voltage swing
US5148061A (en) * 1991-02-27 1992-09-15 Motorola, Inc. ECL to CMOS translation and latch logic circuit
US5283482A (en) * 1992-07-06 1994-02-01 Ncr Corporation CMOS circuit for receiving ECL signals
US5315179A (en) * 1992-09-28 1994-05-24 Motorola, Inc. BICMOS level converter circuit

Also Published As

Publication number Publication date
TW307064B (enExample) 1997-06-01
EP0642226A2 (en) 1995-03-08
EP0642226A3 (en) 1995-09-06
US5469097A (en) 1995-11-21
KR950010367A (ko) 1995-04-28

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Legal Events

Date Code Title Description
A300 Application deemed to be withdrawn because no request for examination was validly filed

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 20011120