GB1277089A - Interface transmitter - Google Patents

Interface transmitter

Info

Publication number
GB1277089A
GB1277089A GB2650769A GB2650769A GB1277089A GB 1277089 A GB1277089 A GB 1277089A GB 2650769 A GB2650769 A GB 2650769A GB 2650769 A GB2650769 A GB 2650769A GB 1277089 A GB1277089 A GB 1277089A
Authority
GB
United Kingdom
Prior art keywords
phase splitter
transistors
long
output stage
supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB2650769A
Inventor
Desmond Ross Armstrong
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Philips Components Ltd
Original Assignee
Mullard Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mullard Ltd filed Critical Mullard Ltd
Priority to GB2650769A priority Critical patent/GB1277089A/en
Publication of GB1277089A publication Critical patent/GB1277089A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01—Shaping pulses
    • H03K5/02—Shaping pulses by amplifying
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/018—Coupling arrangements; Interface arrangements using bipolar transistors only
    • H03K19/01806—Interface arrangements
    • H03K19/01812—Interface arrangements with at least one differential stage
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/00006—Changing the frequency

Abstract

1277089 Computer interface transmitter MULLARD Ltd 23 May 1969 26507/69 Heading H3T A transistorized computer interface transmitter comprises an input long-tail pair phase splitter D.C. coupled to a long-tail pair output stage and means to cause the supply voltage for the loads of the phase splitter to follow variations relative to the earth rail of the emitter supply to the output stage. Variations in the earth rail voltage may thus be prevented from varying the biasing level of transistors. As shown, the input, which may be derived from a T.T.L. logic circuit, is applied via transistors TR1, TR2 and level shifter Z 1 to a long-tail pair phase splitter TR4, TR8, TR10, driving an output stage TR5, TR9, TR7 via an intermediate stage TR3, TR11 and level shifters Z2, Z5. The supply for the collectors of the phase splitter transistors is derived from the emitter of TR6, the base of which is held fixed in relation to the negative rail by diodes D8- D11 and Z7. The increase in saturation voltage of TR7 with temperature is allowed for as the resistors of the circuit have a positive temperature coefficient and the Zener diode voltages increase.
GB2650769A 1969-05-23 1969-05-23 Interface transmitter Expired GB1277089A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB2650769A GB1277089A (en) 1969-05-23 1969-05-23 Interface transmitter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB2650769A GB1277089A (en) 1969-05-23 1969-05-23 Interface transmitter

Publications (1)

Publication Number Publication Date
GB1277089A true GB1277089A (en) 1972-06-07

Family

ID=10244752

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2650769A Expired GB1277089A (en) 1969-05-23 1969-05-23 Interface transmitter

Country Status (1)

Country Link
GB (1) GB1277089A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0447912A2 (en) * 1990-03-19 1991-09-25 Fujitsu Limited Circuit having level converting circuit for converting logic level
EP0453191A2 (en) * 1990-04-16 1991-10-23 Advanced Micro Devices, Inc. Logic translator circuit
US5469097A (en) * 1993-09-08 1995-11-21 Advanced Micro Devices, Inc. Translator circuit with symmetrical switching delays

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0447912A2 (en) * 1990-03-19 1991-09-25 Fujitsu Limited Circuit having level converting circuit for converting logic level
EP0447912A3 (en) * 1990-03-19 1991-12-11 Fujitsu Limited Circuit having level converting circuit for converting logic level
US5162676A (en) * 1990-03-19 1992-11-10 Fujitsu Limited Circuit having level converting circuit for converting logic level
EP0453191A2 (en) * 1990-04-16 1991-10-23 Advanced Micro Devices, Inc. Logic translator circuit
EP0453191A3 (en) * 1990-04-16 1991-12-11 Advanced Micro Devices, Inc. Logic translator circuit
US5469097A (en) * 1993-09-08 1995-11-21 Advanced Micro Devices, Inc. Translator circuit with symmetrical switching delays

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Legal Events

Date Code Title Description
PS Patent sealed
PLNP Patent lapsed through nonpayment of renewal fees