JPH0577330B2 - - Google Patents
Info
- Publication number
- JPH0577330B2 JPH0577330B2 JP28920888A JP28920888A JPH0577330B2 JP H0577330 B2 JPH0577330 B2 JP H0577330B2 JP 28920888 A JP28920888 A JP 28920888A JP 28920888 A JP28920888 A JP 28920888A JP H0577330 B2 JPH0577330 B2 JP H0577330B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- groove
- insulating layer
- trench
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Priority Applications (7)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63289208A JPH02134823A (ja) | 1988-11-16 | 1988-11-16 | 半導体装置の製造方法 |
US07/401,690 US4983543A (en) | 1988-09-07 | 1989-09-01 | Method of manufacturing a semiconductor integrated circuit having an interconnection wire embedded in a protective layer covering the semiconductor integrated circuit |
DE68928873T DE68928873T2 (de) | 1988-09-07 | 1989-09-06 | Herstellungsverfahren für eine integrierte Halbleiterschaltung mit einem Verbundungsleiter, der in einer Schutzschicht auf der integriertere Halbleiterschaltung eingebettet ist |
EP95105869A EP0665589B1 (en) | 1988-09-07 | 1989-09-06 | Method of manufacturing a semiconductor integrated circuit having an interconnection wire embedded in a protective layer covering the semiconductor integrated circuit |
EP89116458A EP0359109B1 (en) | 1988-09-07 | 1989-09-06 | Method of manufacturing a semiconductor integrated circuit having an interconnection wire embedded in a protective layer covering the semiconductor integrated circuit |
DE68928748T DE68928748T2 (de) | 1988-09-07 | 1989-09-06 | Verfahren zum Herstellen einer integrierten Halbleiterschaltung mit einem in einer Schutzschicht integrierten Verbindungsleiter |
KR1019890012954A KR920006573B1 (ko) | 1988-09-07 | 1989-09-07 | 보호층내에 배선을 매설한 반도체 직접회로의 제조방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63289208A JPH02134823A (ja) | 1988-11-16 | 1988-11-16 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH02134823A JPH02134823A (ja) | 1990-05-23 |
JPH0577330B2 true JPH0577330B2 (enrdf_load_stackoverflow) | 1993-10-26 |
Family
ID=17740177
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP63289208A Granted JPH02134823A (ja) | 1988-09-07 | 1988-11-16 | 半導体装置の製造方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02134823A (enrdf_load_stackoverflow) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0629246A (ja) * | 1991-02-04 | 1994-02-04 | Internatl Business Mach Corp <Ibm> | 選択的な無電解メッキの方法 |
-
1988
- 1988-11-16 JP JP63289208A patent/JPH02134823A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPH02134823A (ja) | 1990-05-23 |
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