JPH0573079B2 - - Google Patents

Info

Publication number
JPH0573079B2
JPH0573079B2 JP60192663A JP19266385A JPH0573079B2 JP H0573079 B2 JPH0573079 B2 JP H0573079B2 JP 60192663 A JP60192663 A JP 60192663A JP 19266385 A JP19266385 A JP 19266385A JP H0573079 B2 JPH0573079 B2 JP H0573079B2
Authority
JP
Japan
Prior art keywords
polyimide
semiconductor chip
multilayer wiring
bonding pad
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60192663A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6253000A (ja
Inventor
Hiroyuki Hamaguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP60192663A priority Critical patent/JPS6253000A/ja
Priority to FR868612072A priority patent/FR2586885B1/fr
Publication of JPS6253000A publication Critical patent/JPS6253000A/ja
Publication of JPH0573079B2 publication Critical patent/JPH0573079B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H05K1/113—Via provided in pad; Pad over filled via
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/0154—Polyimide
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203—Fillers and particles
    • H05K2201/0206—Materials
    • H05K2201/0209—Inorganic, non-metallic particles
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/0278—Flat pressure, e.g. for connecting terminals with anisotropic conductive adhesive
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/328—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by welding
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07236—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/877—Bump connectors and die-attach connectors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
JP60192663A 1985-08-31 1985-08-31 半導体の実装構造 Granted JPS6253000A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP60192663A JPS6253000A (ja) 1985-08-31 1985-08-31 半導体の実装構造
FR868612072A FR2586885B1 (fr) 1985-08-31 1986-08-26 Substrat de cablage a couches multiples.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60192663A JPS6253000A (ja) 1985-08-31 1985-08-31 半導体の実装構造

Publications (2)

Publication Number Publication Date
JPS6253000A JPS6253000A (ja) 1987-03-07
JPH0573079B2 true JPH0573079B2 (Direct) 1993-10-13

Family

ID=16294973

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60192663A Granted JPS6253000A (ja) 1985-08-31 1985-08-31 半導体の実装構造

Country Status (2)

Country Link
JP (1) JPS6253000A (Direct)
FR (1) FR2586885B1 (Direct)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4880684A (en) * 1988-03-11 1989-11-14 International Business Machines Corporation Sealing and stress relief layers and use thereof
US7198969B1 (en) 1990-09-24 2007-04-03 Tessera, Inc. Semiconductor chip assemblies, methods of making same and components for same
US5679977A (en) 1990-09-24 1997-10-21 Tessera, Inc. Semiconductor chip assemblies, methods of making same and components for same
US5148265A (en) 1990-09-24 1992-09-15 Ist Associates, Inc. Semiconductor chip assemblies with fan-in leads
US5148266A (en) * 1990-09-24 1992-09-15 Ist Associates, Inc. Semiconductor chip assemblies having interposer and flexible lead
US5379191A (en) * 1991-02-26 1995-01-03 Microelectronics And Computer Technology Corporation Compact adapter package providing peripheral to area translation for an integrated circuit chip
US5289346A (en) * 1991-02-26 1994-02-22 Microelectronics And Computer Technology Corporation Peripheral to area adapter with protective bumper for an integrated circuit chip
DE9112099U1 (de) * 1991-09-27 1991-12-05 Siemens Nixdorf Informationssysteme AG, 4790 Paderborn Flachbaugruppe
JPH07245360A (ja) * 1994-03-02 1995-09-19 Toshiba Corp 半導体パッケージおよびその製造方法
US6347037B2 (en) 1994-04-28 2002-02-12 Fujitsu Limited Semiconductor device and method of forming the same
JP3034180B2 (ja) * 1994-04-28 2000-04-17 富士通株式会社 半導体装置及びその製造方法及び基板
US5627405A (en) * 1995-07-17 1997-05-06 National Semiconductor Corporation Integrated circuit assembly incorporating an anisotropic elecctrically conductive layer

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3529759A (en) * 1967-06-15 1970-09-22 Bell Telephone Labor Inc Apparatus for bonding a beam-lead device to a substrate
JPS52149358A (en) * 1976-06-08 1977-12-12 Fujitsu Ltd Multilayer wiring method
FR2404990A1 (fr) * 1977-10-03 1979-04-27 Cii Honeywell Bull Substrat d'interconnexion de composants electroniques a circuits integres, muni d'un dispositif de reparation
JPS6022396A (ja) * 1983-07-19 1985-02-04 日本電気株式会社 回路基板
JPS6070798A (ja) * 1983-09-27 1985-04-22 富士通株式会社 層間絶縁層

Also Published As

Publication number Publication date
FR2586885A1 (fr) 1987-03-06
FR2586885B1 (fr) 1989-12-01
JPS6253000A (ja) 1987-03-07

Similar Documents

Publication Publication Date Title
US6326696B1 (en) Electronic package with interconnected chips
EP0120500B1 (en) High density lsi package for logic circuits
US5729433A (en) Multiple chip module assembly for top of mother board
JP2974552B2 (ja) 半導体装置
CN1302455A (zh) 层叠的集成电路封装
US5525835A (en) Semiconductor chip module having an electrically insulative thermally conductive thermal dissipator directly in contact with the semiconductor element
US7420126B2 (en) Circuit board and circuit apparatus using the same
JPS6253000A (ja) 半導体の実装構造
JP2803603B2 (ja) マルチチップパッケージ構造
US12237275B2 (en) Semiconductor devices having supportive plating structures
JP2903013B2 (ja) 金属基板を含む回路パッケージ及び実装方法
JPS6250981B2 (Direct)
JP2620611B2 (ja) 電子部品搭載用基板
CN119230509A (zh) 具有多种类型焊球的半导体封装
JP3344362B2 (ja) フィルムキャリア型半導体装置
JPH05218226A (ja) 多層配線基板
US12200861B2 (en) Circuit board structure
JPH0613487A (ja) マルチチップモジュール
JP3207248B2 (ja) 半導体装置
JP2831864B2 (ja) 半導体パッケージ及びその製造方法
CN1347141A (zh) 制作散热型集成电路芯片塑料封装的安装散热片方法
JPS5853854A (ja) 高密度ｌｓｉパツケ−ジ
JPH03212961A (ja) 半導体チップキャリア
JPH11111882A (ja) Ｂｇａ型半導体装置用配線基板およびｂｇａ型半導体装置
JPH0571139B2 (Direct)