JPH0552104B2 - - Google Patents

Info

Publication number
JPH0552104B2
JPH0552104B2 JP63307569A JP30756988A JPH0552104B2 JP H0552104 B2 JPH0552104 B2 JP H0552104B2 JP 63307569 A JP63307569 A JP 63307569A JP 30756988 A JP30756988 A JP 30756988A JP H0552104 B2 JPH0552104 B2 JP H0552104B2
Authority
JP
Japan
Prior art keywords
clock
control circuit
circuit
communication control
communication
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP63307569A
Other languages
English (en)
Japanese (ja)
Other versions
JPH02153653A (ja
Inventor
Akira Takayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yamaha Corp
Original Assignee
Yamaha Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yamaha Corp filed Critical Yamaha Corp
Priority to JP63307569A priority Critical patent/JPH02153653A/ja
Publication of JPH02153653A publication Critical patent/JPH02153653A/ja
Publication of JPH0552104B2 publication Critical patent/JPH0552104B2/ja
Priority to US08/454,845 priority patent/US5737317A/en
Granted legal-status Critical Current

Links

Landscapes

  • Communication Control (AREA)
JP63307569A 1988-12-05 1988-12-05 低消費電力モード制御回路 Granted JPH02153653A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP63307569A JPH02153653A (ja) 1988-12-05 1988-12-05 低消費電力モード制御回路
US08/454,845 US5737317A (en) 1988-12-05 1995-05-31 Communication system testing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63307569A JPH02153653A (ja) 1988-12-05 1988-12-05 低消費電力モード制御回路

Publications (2)

Publication Number Publication Date
JPH02153653A JPH02153653A (ja) 1990-06-13
JPH0552104B2 true JPH0552104B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1993-08-04

Family

ID=17970656

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63307569A Granted JPH02153653A (ja) 1988-12-05 1988-12-05 低消費電力モード制御回路

Country Status (1)

Country Link
JP (1) JPH02153653A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008305329A (ja) * 2007-06-11 2008-12-18 Oki Electric Ind Co Ltd クロックコントローラ及びそれを用いた論理シミュレーション方法と論理シミュレーション装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5975739A (ja) * 1982-10-25 1984-04-28 Fujitsu Ltd デイジタル装置の省電力化方式
JPS6057747A (ja) * 1983-09-08 1985-04-03 Nec Corp 通信用周辺装置
JPS6124353A (ja) * 1984-07-12 1986-02-03 Nec Corp 通信用周辺制御装置

Also Published As

Publication number Publication date
JPH02153653A (ja) 1990-06-13

Similar Documents

Publication Publication Date Title
EP1451666B1 (en) Glitch free clock selection switch
US4686386A (en) Power-down circuits for dynamic MOS integrated circuits
JP2762670B2 (ja) データ処理装置
JPH0433056B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP3460736B2 (ja) クロック制御回路
KR100367634B1 (ko) 메모리 제어기 및 메모리 제어방법
JPH073751B2 (ja) 電流サージ制御集積回路
US5572718A (en) Mechanism for dynamically determining and distributing computer system clocks
EP0225512A1 (en) Digital free-running clock synchronizer
JPH0552104B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
US5587675A (en) Multiclock controller
JP2643579B2 (ja) マイクロコンピュータ
KR100278272B1 (ko) 전력제어시스템
US5617310A (en) Multiple operation mode microcontroller
JPH0731567B2 (ja) クロック制御回路
JPS60251418A (ja) 演算装置の動作周波数切り換え制御回路
JPH03274810A (ja) 半導体集積回路
JPS6348203B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JPS61123916A (ja) マイクロコンピユ−タ
JPH04365110A (ja) クロック停止回路
JPS62235673A (ja) マイクロコンピユ−タ
JPH0763146B2 (ja) スタンバイ回路
JP2580673B2 (ja) 電源制御装置
JP2705311B2 (ja) マイクロコンピュータ
JPS6324569B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Legal Events

Date Code Title Description
S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313532

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20070804

Year of fee payment: 14

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080804

Year of fee payment: 15

LAPS Cancellation because of no payment of annual fees