JPH0550135B2 - - Google Patents

Info

Publication number
JPH0550135B2
JPH0550135B2 JP63225226A JP22522688A JPH0550135B2 JP H0550135 B2 JPH0550135 B2 JP H0550135B2 JP 63225226 A JP63225226 A JP 63225226A JP 22522688 A JP22522688 A JP 22522688A JP H0550135 B2 JPH0550135 B2 JP H0550135B2
Authority
JP
Japan
Prior art keywords
substrate
groove
protrusion
conductive material
substrates
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP63225226A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0272642A (ja
Inventor
Yoshihiro Hayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP63225226A priority Critical patent/JPH0272642A/ja
Priority to US07/401,980 priority patent/US4998665A/en
Publication of JPH0272642A publication Critical patent/JPH0272642A/ja
Publication of JPH0550135B2 publication Critical patent/JPH0550135B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H10W90/00—
    • H10W95/00—
    • H10W46/00—
    • H10W72/01231—
    • H10W72/01251—
    • H10W72/072—
    • H10W72/07227—
    • H10W72/07236—
    • H10W72/241—
    • H10W72/285—
    • H10W90/722—
    • H10W90/724—

Landscapes

  • Wire Bonding (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP63225226A 1988-09-07 1988-09-07 基板の接続構造および接続方法 Granted JPH0272642A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP63225226A JPH0272642A (ja) 1988-09-07 1988-09-07 基板の接続構造および接続方法
US07/401,980 US4998665A (en) 1988-09-07 1989-09-01 Bonding structure of substrates and method for bonding substrates

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63225226A JPH0272642A (ja) 1988-09-07 1988-09-07 基板の接続構造および接続方法

Publications (2)

Publication Number Publication Date
JPH0272642A JPH0272642A (ja) 1990-03-12
JPH0550135B2 true JPH0550135B2 (cg-RX-API-DMAC10.html) 1993-07-28

Family

ID=16825962

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63225226A Granted JPH0272642A (ja) 1988-09-07 1988-09-07 基板の接続構造および接続方法

Country Status (2)

Country Link
US (1) US4998665A (cg-RX-API-DMAC10.html)
JP (1) JPH0272642A (cg-RX-API-DMAC10.html)

Families Citing this family (86)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU637874B2 (en) * 1990-01-23 1993-06-10 Sumitomo Electric Industries, Ltd. Substrate for packaging a semiconductor device
US5280414A (en) * 1990-06-11 1994-01-18 International Business Machines Corp. Au-Sn transient liquid bonding in high performance laminates
CA2071662A1 (en) * 1991-06-26 1992-12-27 Jon J. Gulick Integrated socket-type package for flip-chip semiconductor devices and circuits
WO1993019487A1 (en) * 1992-03-24 1993-09-30 Unisys Corporation Integrated circuit module having microscopic self-alignment features
JPH0621260U (ja) * 1992-05-27 1994-03-18 和正 菅野 半導体集積回路
US5754171A (en) * 1992-10-21 1998-05-19 Photonics Systems, Inc. Display device having integrated circuit chips thereon
US6765561B1 (en) * 1992-10-21 2004-07-20 Ray A. Stoller Display device having integrated circuit chips thereon
US5627106A (en) * 1994-05-06 1997-05-06 United Microelectronics Corporation Trench method for three dimensional chip connecting during IC fabrication
KR960009074A (ko) * 1994-08-29 1996-03-22 모리시다 요이치 반도체 장치 및 그 제조방법
US5841155A (en) * 1995-02-08 1998-11-24 Ngk Insulators, Ltd. Semiconductor device containing two joined substrates
US6020628A (en) * 1997-07-21 2000-02-01 Olin Corporation Optical component package with a hermetic seal
US6110805A (en) 1997-12-19 2000-08-29 Micron Technology, Inc. Method and apparatus for attaching a workpiece to a workpiece support
US6110760A (en) 1998-02-12 2000-08-29 Micron Technology, Inc. Methods of forming electrically conductive interconnections and electrically interconnected substrates
CN1278645A (zh) * 1999-06-22 2001-01-03 张世熹 高密度集成电路之存储器
US20030119278A1 (en) * 2001-12-20 2003-06-26 Mckinnell James C. Substrates bonded with oxide affinity agent and bonding method
US6661085B2 (en) * 2002-02-06 2003-12-09 Intel Corporation Barrier structure against corrosion and contamination in three-dimensional (3-D) wafer-to-wafer vertical stack
US6762076B2 (en) * 2002-02-20 2004-07-13 Intel Corporation Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devices
US6871942B2 (en) * 2002-04-15 2005-03-29 Timothy R. Emery Bonding structure and method of making
US6906598B2 (en) 2002-12-31 2005-06-14 Mcnc Three dimensional multimode and optical coupling devices
US6962835B2 (en) 2003-02-07 2005-11-08 Ziptronix, Inc. Method for room temperature metal direct bonding
JP4887602B2 (ja) 2003-12-16 2012-02-29 大日本印刷株式会社 有機機能素子の製造方法
US7087538B2 (en) * 2004-08-16 2006-08-08 Intel Corporation Method to fill the gap between coupled wafers
US7485968B2 (en) 2005-08-11 2009-02-03 Ziptronix, Inc. 3D IC method and device
JP5380800B2 (ja) * 2007-07-12 2014-01-08 ヤマハ株式会社 電子部品の製造方法
JP5682327B2 (ja) * 2011-01-25 2015-03-11 ソニー株式会社 固体撮像素子、固体撮像素子の製造方法、及び電子機器
ITTO20120374A1 (it) * 2012-04-27 2013-10-28 St Microelectronics Srl Struttura a semiconduttore con regioni conduttive a bassa temperatura di fusione e metodo per riparare una struttura a semiconduttore
FR2983845A1 (fr) * 2012-05-25 2013-06-14 Commissariat Energie Atomique Procede de realisation d'une microstructure comportant deux substrats relies mecaniquement
JP2015115446A (ja) 2013-12-11 2015-06-22 株式会社東芝 半導体装置の製造方法
US20150262902A1 (en) 2014-03-12 2015-09-17 Invensas Corporation Integrated circuits protected by substrates with cavities, and methods of manufacture
US11069734B2 (en) 2014-12-11 2021-07-20 Invensas Corporation Image sensor device
US9741620B2 (en) 2015-06-24 2017-08-22 Invensas Corporation Structures and methods for reliable packages
US10886250B2 (en) 2015-07-10 2021-01-05 Invensas Corporation Structures and methods for low temperature bonding using nanoparticles
US9953941B2 (en) 2015-08-25 2018-04-24 Invensas Bonding Technologies, Inc. Conductive barrier direct hybrid bonding
US9852988B2 (en) 2015-12-18 2017-12-26 Invensas Bonding Technologies, Inc. Increased contact alignment tolerance for direct bonding
US10446532B2 (en) 2016-01-13 2019-10-15 Invensas Bonding Technologies, Inc. Systems and methods for efficient transfer of semiconductor elements
US10204893B2 (en) 2016-05-19 2019-02-12 Invensas Bonding Technologies, Inc. Stacked dies and methods for forming bonded structures
US10446487B2 (en) 2016-09-30 2019-10-15 Invensas Bonding Technologies, Inc. Interface structures and methods for forming same
US10580735B2 (en) 2016-10-07 2020-03-03 Xcelsis Corporation Stacked IC structure with system level wiring on multiple sides of the IC die
TWI892323B (zh) 2016-10-27 2025-08-01 美商艾德亞半導體科技有限責任公司 用於低溫接合的結構和方法
US10002844B1 (en) 2016-12-21 2018-06-19 Invensas Bonding Technologies, Inc. Bonded structures
US11626363B2 (en) 2016-12-29 2023-04-11 Adeia Semiconductor Bonding Technologies Inc. Bonded structures with integrated passive component
US10276909B2 (en) 2016-12-30 2019-04-30 Invensas Bonding Technologies, Inc. Structure comprising at least a first element bonded to a carrier having a closed metallic channel waveguide formed therein
WO2018147940A1 (en) * 2017-02-09 2018-08-16 Invensas Bonding Technologies, Inc. Bonded structures
US10629577B2 (en) 2017-03-16 2020-04-21 Invensas Corporation Direct-bonded LED arrays and applications
US10515913B2 (en) 2017-03-17 2019-12-24 Invensas Bonding Technologies, Inc. Multi-metal contact structure
US10508030B2 (en) 2017-03-21 2019-12-17 Invensas Bonding Technologies, Inc. Seal for microelectronic assembly
US10784191B2 (en) 2017-03-31 2020-09-22 Invensas Bonding Technologies, Inc. Interface structures and methods for forming same
US10879212B2 (en) 2017-05-11 2020-12-29 Invensas Bonding Technologies, Inc. Processed stacked dies
US10446441B2 (en) 2017-06-05 2019-10-15 Invensas Corporation Flat metal features for microelectronics applications
US10217720B2 (en) 2017-06-15 2019-02-26 Invensas Corporation Multi-chip modules formed using wafer-level processing of a reconstitute wafer
US10840205B2 (en) 2017-09-24 2020-11-17 Invensas Bonding Technologies, Inc. Chemical mechanical polishing for hybrid bonding
US10923408B2 (en) 2017-12-22 2021-02-16 Invensas Bonding Technologies, Inc. Cavity packages
US11380597B2 (en) 2017-12-22 2022-07-05 Invensas Bonding Technologies, Inc. Bonded structures
US11169326B2 (en) 2018-02-26 2021-11-09 Invensas Bonding Technologies, Inc. Integrated optical waveguides, direct-bonded waveguide interface joints, optical routing and interconnects
US11256004B2 (en) 2018-03-20 2022-02-22 Invensas Bonding Technologies, Inc. Direct-bonded lamination for improved image clarity in optical devices
US11056348B2 (en) 2018-04-05 2021-07-06 Invensas Bonding Technologies, Inc. Bonding surfaces for microelectronics
US11244916B2 (en) 2018-04-11 2022-02-08 Invensas Bonding Technologies, Inc. Low temperature bonded structures
US10790262B2 (en) 2018-04-11 2020-09-29 Invensas Bonding Technologies, Inc. Low temperature bonded structures
US11004757B2 (en) 2018-05-14 2021-05-11 Invensas Bonding Technologies, Inc. Bonded structures
US11276676B2 (en) 2018-05-15 2022-03-15 Invensas Bonding Technologies, Inc. Stacked devices and methods of fabrication
CN112585740B (zh) 2018-06-13 2025-05-13 隔热半导体粘合技术公司 作为焊盘的tsv
US11393779B2 (en) 2018-06-13 2022-07-19 Invensas Bonding Technologies, Inc. Large metal pads over TSV
US11158606B2 (en) 2018-07-06 2021-10-26 Invensas Bonding Technologies, Inc. Molded direct bonded and interconnected stack
US11462419B2 (en) 2018-07-06 2022-10-04 Invensas Bonding Technologies, Inc. Microelectronic assemblies
US11515291B2 (en) 2018-08-28 2022-11-29 Adeia Semiconductor Inc. Integrated voltage regulator and passive components
US11011494B2 (en) 2018-08-31 2021-05-18 Invensas Bonding Technologies, Inc. Layer structures for making direct metal-to-metal bonds at low temperatures in microelectronics
DE102018125901A1 (de) * 2018-10-18 2020-04-23 Osram Opto Semiconductors Gmbh Verfahren zur Herstellung eines elektronischen Bauelements, Halbleiterchip, elektronisches Bauelement und Verfahren zur Herstellung eines Halbleiterchips
US11158573B2 (en) 2018-10-22 2021-10-26 Invensas Bonding Technologies, Inc. Interconnect structures
US11244920B2 (en) 2018-12-18 2022-02-08 Invensas Bonding Technologies, Inc. Method and structures for low temperature device bonding
US11476213B2 (en) 2019-01-14 2022-10-18 Invensas Bonding Technologies, Inc. Bonded structures without intervening adhesive
US11901281B2 (en) 2019-03-11 2024-02-13 Adeia Semiconductor Bonding Technologies Inc. Bonded structures with integrated passive component
US12374641B2 (en) 2019-06-12 2025-07-29 Adeia Semiconductor Bonding Technologies Inc. Sealed bonded structures and methods for forming the same
US11296053B2 (en) 2019-06-26 2022-04-05 Invensas Bonding Technologies, Inc. Direct bonded stack structures for increased reliability and improved yield in microelectronics
US12080672B2 (en) 2019-09-26 2024-09-03 Adeia Semiconductor Bonding Technologies Inc. Direct gang bonding methods including directly bonding first element to second element to form bonded structure without adhesive
US11762200B2 (en) 2019-12-17 2023-09-19 Adeia Semiconductor Bonding Technologies Inc. Bonded optical devices
WO2021236361A1 (en) 2020-05-19 2021-11-25 Invensas Bonding Technologies, Inc. Laterally unconfined structure
US11631647B2 (en) 2020-06-30 2023-04-18 Adeia Semiconductor Bonding Technologies Inc. Integrated device packages with integrated device die and dummy element
KR102781960B1 (ko) 2020-07-30 2025-03-19 삼성전자주식회사 반도체 패키지
US11764177B2 (en) 2020-09-04 2023-09-19 Adeia Semiconductor Bonding Technologies Inc. Bonded structure with interconnect structure
US11728273B2 (en) 2020-09-04 2023-08-15 Adeia Semiconductor Bonding Technologies Inc. Bonded structure with interconnect structure
US11264357B1 (en) 2020-10-20 2022-03-01 Invensas Corporation Mixed exposure for large die
US12456662B2 (en) 2020-12-28 2025-10-28 Adeia Semiconductor Bonding Technologies Inc. Structures with through-substrate vias and methods for forming the same
EP4268274A4 (en) 2020-12-28 2024-10-30 Adeia Semiconductor Bonding Technologies Inc. STRUCTURES COMPRISING THROUGH-THROUGH-SUBSTRATE VIA HOLES AND METHODS OF FORMING SAME
JP7783896B2 (ja) 2020-12-30 2025-12-10 アデイア セミコンダクター ボンディング テクノロジーズ インコーポレイテッド 導電特徴部を備えた構造体及びその形成方法
US12512425B2 (en) 2022-04-25 2025-12-30 Adeia Semiconductor Bonding Technologies Inc. Expansion controlled structure for direct bonding and method of forming same
US12506114B2 (en) 2022-12-29 2025-12-23 Adeia Semiconductor Bonding Technologies Inc. Directly bonded metal structures having aluminum features and methods of preparing same

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3373481A (en) * 1965-06-22 1968-03-19 Sperry Rand Corp Method of electrically interconnecting conductors
US3778530A (en) * 1971-04-01 1973-12-11 W Reimann Flatpack lead positioning device
US4176443A (en) * 1977-03-08 1979-12-04 Sgs-Ates Componenti Elettronici S.P.A. Method of connecting semiconductor structure to external circuits
JPS61153374U (cg-RX-API-DMAC10.html) * 1985-03-14 1986-09-22
US4605153A (en) * 1985-06-17 1986-08-12 Northern Telecom Limited Shaped solder pad for reflow soldering of surface mounting cylindrical devices on a circuit board
US4836435A (en) * 1986-05-12 1989-06-06 International Business Machines Corporation Component self alignment
JPH07112041B2 (ja) * 1986-12-03 1995-11-29 シャープ株式会社 半導体装置の製造方法

Also Published As

Publication number Publication date
US4998665A (en) 1991-03-12
JPH0272642A (ja) 1990-03-12

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