JPH0531301B2 - - Google Patents
Info
- Publication number
- JPH0531301B2 JPH0531301B2 JP58083045A JP8304583A JPH0531301B2 JP H0531301 B2 JPH0531301 B2 JP H0531301B2 JP 58083045 A JP58083045 A JP 58083045A JP 8304583 A JP8304583 A JP 8304583A JP H0531301 B2 JPH0531301 B2 JP H0531301B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- film
- forming
- opening
- organic polymer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8304583A JPS59208748A (ja) | 1983-05-12 | 1983-05-12 | 半導体装置の製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8304583A JPS59208748A (ja) | 1983-05-12 | 1983-05-12 | 半導体装置の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59208748A JPS59208748A (ja) | 1984-11-27 |
| JPH0531301B2 true JPH0531301B2 (enExample) | 1993-05-12 |
Family
ID=13791227
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8304583A Granted JPS59208748A (ja) | 1983-05-12 | 1983-05-12 | 半導体装置の製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59208748A (enExample) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100712487B1 (ko) * | 2000-09-29 | 2007-04-27 | 삼성전자주식회사 | 접촉 저항을 줄일 수 있는 비아홀 플러그 및 그 형성 방법 |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4367119A (en) * | 1980-08-18 | 1983-01-04 | International Business Machines Corporation | Planar multi-level metal process with built-in etch stop |
-
1983
- 1983-05-12 JP JP8304583A patent/JPS59208748A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS59208748A (ja) | 1984-11-27 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP0523856A2 (en) | Method of via formation for multilevel interconnect integrated circuits | |
| JPH027544A (ja) | 柱の整合及び製造工程 | |
| JPH098130A (ja) | 半導体デバイスのビアホール形成方法 | |
| JPH0531301B2 (enExample) | ||
| KR20030050790A (ko) | 반도체 패드 영역 및 퓨즈 영역 형성방법 | |
| JP3323264B2 (ja) | 半導体装置の製造方法 | |
| JP2551030B2 (ja) | 半導体装置およびその製造方法 | |
| KR100532981B1 (ko) | 반도체소자 식각방법 | |
| JPS62118539A (ja) | 多層配線の形成方法 | |
| JPH0245934A (ja) | 半導体装置の製造方法 | |
| JPS6362104B2 (enExample) | ||
| JPH09172075A (ja) | 半導体装置の多層配線における層間接続孔の製造方法 | |
| JPH09330976A (ja) | 半導体装置の製造方法 | |
| JPH0448634A (ja) | 半導体装置の製造方法 | |
| JPH03291936A (ja) | 半導体装置の製造方法 | |
| JPS58122751A (ja) | 半導体装置 | |
| JPS63166248A (ja) | 半導体集積回路装置及びその製造方法 | |
| JPS61174638A (ja) | 電極金属配線パタ−ンの形成方法 | |
| JPH0574219B2 (enExample) | ||
| JPS61288445A (ja) | 半導体装置の製造方法 | |
| JPS60227440A (ja) | 半導体装置の製造方法 | |
| JPH08222628A (ja) | 半導体装置の製造方法 | |
| JPS60152043A (ja) | 多層配線構造の形成方法 | |
| JPH04247642A (ja) | メタルプラグの形成方法 | |
| JPH0291968A (ja) | メモリ装置の製造方法 |