JPH0481329B2 - - Google Patents

Info

Publication number
JPH0481329B2
JPH0481329B2 JP57122105A JP12210582A JPH0481329B2 JP H0481329 B2 JPH0481329 B2 JP H0481329B2 JP 57122105 A JP57122105 A JP 57122105A JP 12210582 A JP12210582 A JP 12210582A JP H0481329 B2 JPH0481329 B2 JP H0481329B2
Authority
JP
Japan
Prior art keywords
film
insulating film
substrate
etching
sio
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57122105A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5913342A (ja
Inventor
Ryozo Nakayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP12210582A priority Critical patent/JPS5913342A/ja
Publication of JPS5913342A publication Critical patent/JPS5913342A/ja
Publication of JPH0481329B2 publication Critical patent/JPH0481329B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76229Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Drying Of Semiconductors (AREA)
  • Element Separation (AREA)
JP12210582A 1982-07-15 1982-07-15 半導体装置の製造方法 Granted JPS5913342A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12210582A JPS5913342A (ja) 1982-07-15 1982-07-15 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12210582A JPS5913342A (ja) 1982-07-15 1982-07-15 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS5913342A JPS5913342A (ja) 1984-01-24
JPH0481329B2 true JPH0481329B2 (ko) 1992-12-22

Family

ID=14827761

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12210582A Granted JPS5913342A (ja) 1982-07-15 1982-07-15 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS5913342A (ko)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS618945A (ja) * 1984-06-25 1986-01-16 Nec Corp 半導体集積回路装置
US5173439A (en) * 1989-10-25 1992-12-22 International Business Machines Corporation Forming wide dielectric-filled isolation trenches in semi-conductors
KR100444311B1 (ko) * 1997-06-28 2004-11-08 주식회사 하이닉스반도체 반도체소자의소자분리막제조방법

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5363871A (en) * 1976-11-18 1978-06-07 Matsushita Electric Ind Co Ltd Production of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5363871A (en) * 1976-11-18 1978-06-07 Matsushita Electric Ind Co Ltd Production of semiconductor device

Also Published As

Publication number Publication date
JPS5913342A (ja) 1984-01-24

Similar Documents

Publication Publication Date Title
KR100213196B1 (ko) 트렌치 소자분리
EP0545263B1 (en) Method of forming trench isolation having polishing step and method of manufacturing semiconductor device
JPH01290236A (ja) 幅の広いトレンチを平坦化する方法
US5413953A (en) Method for planarizing an insulator on a semiconductor substrate using ion implantation
USRE38363E1 (en) Method of forming trench isolation having polishing step and method of manufacturing semiconductor device
JPS6115344A (ja) 半導体構造体の形成方法
JPS58210634A (ja) 半導体装置の製造方法
US6159822A (en) Self-planarized shallow trench isolation
JPH0661342A (ja) トレンチ素子分離膜製造方法
JP2838992B2 (ja) 半導体装置の製造方法
JPH05226478A (ja) 半導体構造用のスタッドを形成する方法および半導体デバイス
US6171929B1 (en) Shallow trench isolator via non-critical chemical mechanical polishing
JPH03787B2 (ko)
JPH10144782A (ja) 隔離領域の形成方法
US6258726B1 (en) Method of forming isolation film for semiconductor devices
JPS6126240A (ja) 絶縁分離方法
JP2000164690A (ja) 半導体装置の製造方法
JPH0481329B2 (ko)
KR100245307B1 (ko) 반도체 장치의 소자 분리방법
JP3897071B2 (ja) 半導体装置の製造方法
JPH0478013B2 (ko)
JPH04209534A (ja) 半導体装置の製造方法
KR100587038B1 (ko) 이중막 실리콘 기판의 제조 방법
JPH0422021B2 (ko)
JPS6310898B2 (ko)