JPH0481329B2 - - Google Patents
Info
- Publication number
- JPH0481329B2 JPH0481329B2 JP57122105A JP12210582A JPH0481329B2 JP H0481329 B2 JPH0481329 B2 JP H0481329B2 JP 57122105 A JP57122105 A JP 57122105A JP 12210582 A JP12210582 A JP 12210582A JP H0481329 B2 JPH0481329 B2 JP H0481329B2
- Authority
- JP
- Japan
- Prior art keywords
- film
- insulating film
- substrate
- etching
- sio
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76229—Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
- Element Separation (AREA)
- Local Oxidation Of Silicon (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12210582A JPS5913342A (ja) | 1982-07-15 | 1982-07-15 | 半導体装置の製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12210582A JPS5913342A (ja) | 1982-07-15 | 1982-07-15 | 半導体装置の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5913342A JPS5913342A (ja) | 1984-01-24 |
| JPH0481329B2 true JPH0481329B2 (en:Method) | 1992-12-22 |
Family
ID=14827761
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12210582A Granted JPS5913342A (ja) | 1982-07-15 | 1982-07-15 | 半導体装置の製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5913342A (en:Method) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS618945A (ja) * | 1984-06-25 | 1986-01-16 | Nec Corp | 半導体集積回路装置 |
| US5173439A (en) * | 1989-10-25 | 1992-12-22 | International Business Machines Corporation | Forming wide dielectric-filled isolation trenches in semi-conductors |
| KR100444311B1 (ko) * | 1997-06-28 | 2004-11-08 | 주식회사 하이닉스반도체 | 반도체소자의소자분리막제조방법 |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5363871A (en) * | 1976-11-18 | 1978-06-07 | Matsushita Electric Ind Co Ltd | Production of semiconductor device |
-
1982
- 1982-07-15 JP JP12210582A patent/JPS5913342A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5913342A (ja) | 1984-01-24 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR100213196B1 (ko) | 트렌치 소자분리 | |
| EP0545263B1 (en) | Method of forming trench isolation having polishing step and method of manufacturing semiconductor device | |
| JPH01290236A (ja) | 幅の広いトレンチを平坦化する方法 | |
| US5413953A (en) | Method for planarizing an insulator on a semiconductor substrate using ion implantation | |
| US6159822A (en) | Self-planarized shallow trench isolation | |
| USRE38363E1 (en) | Method of forming trench isolation having polishing step and method of manufacturing semiconductor device | |
| JPS6115344A (ja) | 半導体構造体の形成方法 | |
| JPS58210634A (ja) | 半導体装置の製造方法 | |
| JPH0661342A (ja) | トレンチ素子分離膜製造方法 | |
| JP2838992B2 (ja) | 半導体装置の製造方法 | |
| JPH05226478A (ja) | 半導体構造用のスタッドを形成する方法および半導体デバイス | |
| US6171929B1 (en) | Shallow trench isolator via non-critical chemical mechanical polishing | |
| JPH03787B2 (en:Method) | ||
| JPH10144782A (ja) | 隔離領域の形成方法 | |
| JPS6126240A (ja) | 絶縁分離方法 | |
| JP2003243293A (ja) | 半導体装置の製造方法 | |
| JPH0481329B2 (en:Method) | ||
| KR100245307B1 (ko) | 반도체 장치의 소자 분리방법 | |
| JP3897071B2 (ja) | 半導体装置の製造方法 | |
| JPS59182538A (ja) | 半導体装置およびその製造方法 | |
| JPH04209534A (ja) | 半導体装置の製造方法 | |
| JPH0478013B2 (en:Method) | ||
| KR100587038B1 (ko) | 이중막 실리콘 기판의 제조 방법 | |
| JPH0422021B2 (en:Method) | ||
| JPS6310898B2 (en:Method) |