JPH0469941A - 集積回路のボンディング方式 - Google Patents

集積回路のボンディング方式

Info

Publication number
JPH0469941A
JPH0469941A JP2182379A JP18237990A JPH0469941A JP H0469941 A JPH0469941 A JP H0469941A JP 2182379 A JP2182379 A JP 2182379A JP 18237990 A JP18237990 A JP 18237990A JP H0469941 A JPH0469941 A JP H0469941A
Authority
JP
Japan
Prior art keywords
wire
wires
integrated circuit
chip
protective frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2182379A
Other languages
English (en)
Inventor
Hisashi Nanba
難波　久志
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP2182379A priority Critical patent/JPH0469941A/ja
Publication of JPH0469941A publication Critical patent/JPH0469941A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4899—Auxiliary members for wire connectors, e.g. flow-barriers, reinforcing structures, spacers, alignment aids
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は集積回路と基板とを接続するボンディング方式
に関する。
〔従来の技術〕
従来のボンディング方式は第２図（ａ）　、　（ｂ）に
示すように、ＩＣチップ２内のポンディングパッド６と
、基板１上に設けられた外部ポンディングパッド３とを
ワイヤー５により接続している。
〔発明が解決しようとする課題〕
この従来のボンディング方式ではＩＣチップ内のポンデ
ィングパッドと基板上の外部ポンディングパッドをワイ
ヤーで接続する際にワイヤーの位置或いは張り具合等を
規制することがないため、第２図ｆａ）に示すようなチ
ップ２のエツジにワイヤー５が接触するか、第２図ｆｂ
）に示すように隣接するワイヤ−５同士が接触するとい
う問題点があった。又、電子部品搭載基板の検査におい
て、故ｌＩａ、を断時プローブによる探針の際、プロー
ブがワイヤー５に触れることにより、上記した第２図（
ａ）　、　ｆｂ）に示ず状況を引起こずという問題点が
あった。
本発明の目的はワイヤーの接触事故等を防止する半導体
回路のボンディング方式を提供することにある。
〔課題を解決するための手段〕
前記目的を達成するため、本発明に係る集積回路のボン
ディング方式においては、保護枠を用いて、集積回路と
基板とをワイヤーにより接続する集積回路のボンデイン
ク方式であって、保護枠は、集積回路と基板との間に配
置され、ワイヤーが挿通する溝を有するものであり、ワ
イヤーを保護枠の清に挿通させることにより、ワイヤー
相互間を分離し、かつ所望の高さ位置に保持し、該ワイ
ヤーにより集積回路と基板とを接続するものである。
Ｃ作用〕 ワイヤーは保護枠の溝に挿通させることにより、ワイヤ
ー相互間を分離し、かつ所望の高さ位置に保持されるこ
ととなる。これにより、隣接するワイヤー同士が接触す
ること及びワイヤーが集積回路のエツジ等に接触するこ
とが回避される。
〔実施例〕
以下、本発明の一実施例を図により説明する。
第１図（ａ）は本発明の一実施例を示す断面図、第１図
（ｂ）は同平面図、第１図（Ｃ）は拡大斜視図である。
図において、本発明においては、基板１上に搭載された
集積回路（以下、ＩＣチップという）１の周囲を囲んで
矩形状の保護枠４が配置しである。
（Ｘｆｉ枠４は、ＩＣチップ１の位置より上方に立上っ
ており、その上縁には、ＩＣチップ１のポンディングパ
ッド６に対応させて消７を設けている。
本発明では、まずワイヤー５の一端をＩＣチップ１のポ
ンディングパッド６に接合させ、次いでワイヤー５を保
護枠４の涌７に挿通さぜな状態で基板１のポンディング
パッド３側に引出してワイヤー５をパッド３に接合さぜ
る。
本発明によれば、ワイヤー５は保護枠４の消７に挿通保
持されることにより、隣接するワイヤー相互間が分離さ
れるとともに、ワイヤーがＩＣチップのエツジ等から離
れた所望の高さ位置に保持される。
〔発明の効果〕
以上説明したように本発明はボンディングワイヤーのＩ
Ｃチップエツジへの接触、及び隣接するワイヤ間の接触
を無くすことができる。
【図面の簡単な説明】
第１図（ａ）は本発明の一実施例を示す断面図、第１図
（ｂ）は同平面図、第１図（Ｃ）は拡大斜視図、第２図
（ａ）は従来例を示す正面図、第２図（ｂ）は同平面図
である。 １・・・基板　　　　　　　２・・・ＩＣチップ３．６
・・・ポンディングパッド ４・・・保護枠　　　　　　５・・・ワイヤー７・・・
消 特許出願人　　　日本電気株式会社 代　　理　　人　　　　弁理士　菅　野　　　中（ｂ） 第１図

Claims (1)

    【特許請求の範囲】
  1. （１）保護枠を用いて、集積回路と基板とをワイヤーに
    より接続する集積回路のボンディング方式であって、 保護枠は、集積回路と基板との間に配置され、ワイヤー
    が挿通する溝を有するものであり、ワイヤーを保護枠の
    溝に挿通させることにより、ワイヤー相互間を分離し、
    かつ所望の高さ位置に保持し、該ワイヤーにより集積回
    路と基板とを接続することを特徴とする集積回路のボン
    ディング方式。
JP2182379A 1990-07-10 1990-07-10 集積回路のボンディング方式 Pending JPH0469941A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2182379A JPH0469941A (ja) 1990-07-10 1990-07-10 集積回路のボンディング方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2182379A JPH0469941A (ja) 1990-07-10 1990-07-10 集積回路のボンディング方式

Publications (1)

Publication Number Publication Date
JPH0469941A true JPH0469941A (ja) 1992-03-05

Family

ID=16117285

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2182379A Pending JPH0469941A (ja) 1990-07-10 1990-07-10 集積回路のボンディング方式

Country Status (1)

Country Link
JP (1) JPH0469941A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108807337A (zh) * 2018-06-27 2018-11-13 山东傲天环保科技有限公司 一种cob封装结构

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108807337A (zh) * 2018-06-27 2018-11-13 山东傲天环保科技有限公司 一种cob封装结构
CN108807337B (zh) * 2018-06-27 2020-10-20 上海纬而视科技股份有限公司 一种cob封装结构

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