JPH0467372B2 - - Google Patents
Info
- Publication number
- JPH0467372B2 JPH0467372B2 JP59175462A JP17546284A JPH0467372B2 JP H0467372 B2 JPH0467372 B2 JP H0467372B2 JP 59175462 A JP59175462 A JP 59175462A JP 17546284 A JP17546284 A JP 17546284A JP H0467372 B2 JPH0467372 B2 JP H0467372B2
- Authority
- JP
- Japan
- Prior art keywords
- gate
- clock
- gate pulse
- circuit
- pulse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000010355 oscillation Effects 0.000 claims description 16
- 230000001360 synchronised effect Effects 0.000 claims description 9
- 238000007493 shaping process Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 239000003990 capacitor Substances 0.000 description 2
- 244000145845 chattering Species 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
- H04N5/445—Receiver circuitry for the reception of television signals according to analogue transmission standards for displaying additional information
- H04N5/44504—Circuit details of the additional information generator, e.g. details of the character or graphics signal generator, overlay mixing circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
- H03K5/135—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of time reference signals, e.g. clock signals
Landscapes
- Engineering & Computer Science (AREA)
- Computer Graphics (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Synchronizing For Television (AREA)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59175462A JPS6153817A (ja) | 1984-08-23 | 1984-08-23 | タイミング発生装置 |
DE8585110534T DE3584497D1 (de) | 1984-08-23 | 1985-08-22 | Zeitimpulsgenerator zur erzeugung von mit dem horizontalen videosynchronisationssignal synchronisierten zeitimpulsen. |
EP85110534A EP0178429B1 (en) | 1984-08-23 | 1985-08-22 | A timing pulse generator for generating timing pulses synchronized with horizontal synchronizing signal in video signal |
US06/768,756 US4736162A (en) | 1984-08-23 | 1985-08-23 | Timing pulse generator for generating timing pulses synchronized with the horizontal synchronizing signal in a video signal |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59175462A JPS6153817A (ja) | 1984-08-23 | 1984-08-23 | タイミング発生装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6153817A JPS6153817A (ja) | 1986-03-17 |
JPH0467372B2 true JPH0467372B2 (US06262066-20010717-C00424.png) | 1992-10-28 |
Family
ID=15996485
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59175462A Granted JPS6153817A (ja) | 1984-08-23 | 1984-08-23 | タイミング発生装置 |
Country Status (4)
Country | Link |
---|---|
US (1) | US4736162A (US06262066-20010717-C00424.png) |
EP (1) | EP0178429B1 (US06262066-20010717-C00424.png) |
JP (1) | JPS6153817A (US06262066-20010717-C00424.png) |
DE (1) | DE3584497D1 (US06262066-20010717-C00424.png) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0318986B1 (en) * | 1987-11-30 | 1996-03-06 | Nec Corporation | Apparatus for generating a picture signal at precise horizontal position |
US4970596A (en) * | 1988-09-07 | 1990-11-13 | North American Philips Corp. | Pseudo line locked write clock for picture-in-picture video applications |
US4905085A (en) * | 1988-09-29 | 1990-02-27 | E. I. Du Pont De Nemours And Company | Synchronous sampling system |
US5175620A (en) * | 1989-11-14 | 1992-12-29 | Samsung Electronics Co., Ltd. | Synchronism detecting circuit utilizing pulse width |
US5084913A (en) * | 1990-07-26 | 1992-01-28 | Unisys Corporation | Programmable multi-mode two-channel timing generator |
JPH04219786A (ja) * | 1990-12-20 | 1992-08-10 | Sony Corp | 周波数判別回路 |
GB2255247B (en) * | 1991-04-23 | 1994-12-14 | Eev Ltd | Pulse generating circuits |
US5144170A (en) * | 1991-06-28 | 1992-09-01 | Motorola, Inc. | Circuit and method of aligning clock signals |
US5144430A (en) * | 1991-08-09 | 1992-09-01 | North American Philips Corporation | Device and method for generating a video signal oscilloscope trigger signal |
US5343301A (en) * | 1992-11-05 | 1994-08-30 | Ampex Systems Corporation | Input clock presence detector for a digital video input |
US5371416A (en) * | 1993-04-05 | 1994-12-06 | Motorola, Inc. | Circuit and method of synchronizing clock signals |
US5719517A (en) * | 1993-06-29 | 1998-02-17 | Mitsubishi Denki Kabushiki Kaisha | Clock generating circuit for digital circuit operating in synchronism with clock, semiconductor integrated circuit including them, and logical gate used for them |
JP2919278B2 (ja) * | 1994-09-14 | 1999-07-12 | 日本電気株式会社 | マルチシンク対応液晶ディスプレイ装置の表示制御装置及び表示制御方法 |
JP2666756B2 (ja) * | 1995-01-30 | 1997-10-22 | 日本電気株式会社 | 半導体装置 |
KR0164538B1 (ko) * | 1995-12-05 | 1999-03-20 | 김광호 | 디지탈 영상처리장치의 의사동기신호 발생회로 |
US5844622A (en) * | 1995-12-12 | 1998-12-01 | Trw Inc. | Digital video horizontal synchronization pulse detector and processor |
JP3643822B2 (ja) * | 2002-09-20 | 2005-04-27 | 沖電気工業株式会社 | インタフェース回路 |
CN114039577B (zh) * | 2021-11-04 | 2024-06-28 | 无锡安趋电子有限公司 | 一种抗噪声干扰的自适应复位窄脉冲产生电路 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS581785B2 (ja) * | 1977-12-15 | 1983-01-12 | 株式会社東芝 | 陰極線管の表示装置 |
GB2080585B (en) * | 1980-07-22 | 1984-07-04 | Tokyo Shibaura Electric Co | Semiconductor integrated circuit with reduced power consumption |
GB2093239B (en) * | 1981-02-18 | 1984-09-12 | Philips Electronic Associated | Pulse generator |
JPS6098770A (ja) * | 1983-11-04 | 1985-06-01 | Funai Denki Kk | 同期回路 |
-
1984
- 1984-08-23 JP JP59175462A patent/JPS6153817A/ja active Granted
-
1985
- 1985-08-22 EP EP85110534A patent/EP0178429B1/en not_active Expired - Lifetime
- 1985-08-22 DE DE8585110534T patent/DE3584497D1/de not_active Expired - Lifetime
- 1985-08-23 US US06/768,756 patent/US4736162A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPS6153817A (ja) | 1986-03-17 |
EP0178429B1 (en) | 1991-10-23 |
US4736162A (en) | 1988-04-05 |
EP0178429A3 (en) | 1988-04-27 |
DE3584497D1 (de) | 1991-11-28 |
EP0178429A2 (en) | 1986-04-23 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EXPY | Cancellation because of completion of term |