JPH0466118B2 - - Google Patents

Info

Publication number
JPH0466118B2
JPH0466118B2 JP59273748A JP27374884A JPH0466118B2 JP H0466118 B2 JPH0466118 B2 JP H0466118B2 JP 59273748 A JP59273748 A JP 59273748A JP 27374884 A JP27374884 A JP 27374884A JP H0466118 B2 JPH0466118 B2 JP H0466118B2
Authority
JP
Japan
Prior art keywords
outer lead
semiconductor device
printed circuit
bonding
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59273748A
Other languages
English (en)
Japanese (ja)
Other versions
JPS61154196A (ja
Inventor
Minoru Okamura
Tatsuo Sato
Hideaki Myoshi
Juji Kanda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kaijo Corp
NEC Corp
Original Assignee
Kaijo Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kaijo Corp, Nippon Electric Co Ltd filed Critical Kaijo Corp
Priority to JP59273748A priority Critical patent/JPS61154196A/ja
Publication of JPS61154196A publication Critical patent/JPS61154196A/ja
Publication of JPH0466118B2 publication Critical patent/JPH0466118B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto

Landscapes

  • Wire Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
JP59273748A 1984-12-27 1984-12-27 アウタ−リ−ドボンデイング装置 Granted JPS61154196A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59273748A JPS61154196A (ja) 1984-12-27 1984-12-27 アウタ−リ−ドボンデイング装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59273748A JPS61154196A (ja) 1984-12-27 1984-12-27 アウタ−リ−ドボンデイング装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP61139291A Division JPS6284529A (ja) 1986-06-17 1986-06-17 キヤリヤテ−プ打抜装置

Publications (2)

Publication Number Publication Date
JPS61154196A JPS61154196A (ja) 1986-07-12
JPH0466118B2 true JPH0466118B2 (fr) 1992-10-22

Family

ID=17532022

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59273748A Granted JPS61154196A (ja) 1984-12-27 1984-12-27 アウタ−リ−ドボンデイング装置

Country Status (1)

Country Link
JP (1) JPS61154196A (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0514512Y2 (fr) * 1988-03-08 1993-04-19

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5986287A (ja) * 1982-11-08 1984-05-18 株式会社新川 アウタ−リ−ドボンデイング装置
JPS59175132A (ja) * 1983-03-23 1984-10-03 Nec Corp テ−プキヤリア方式による半導体装置の製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5986287A (ja) * 1982-11-08 1984-05-18 株式会社新川 アウタ−リ−ドボンデイング装置
JPS59175132A (ja) * 1983-03-23 1984-10-03 Nec Corp テ−プキヤリア方式による半導体装置の製造方法

Also Published As

Publication number Publication date
JPS61154196A (ja) 1986-07-12

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