JPH045265B2 - - Google Patents

Info

Publication number
JPH045265B2
JPH045265B2 JP57183016A JP18301682A JPH045265B2 JP H045265 B2 JPH045265 B2 JP H045265B2 JP 57183016 A JP57183016 A JP 57183016A JP 18301682 A JP18301682 A JP 18301682A JP H045265 B2 JPH045265 B2 JP H045265B2
Authority
JP
Japan
Prior art keywords
layer
forming
polysilicon
drain
source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57183016A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58118158A (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS58118158A publication Critical patent/JPS58118158A/ja
Publication of JPH045265B2 publication Critical patent/JPH045265B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/027—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
    • H10D30/0273—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs forming final gates or dummy gates after forming source and drain electrodes, e.g. contact first technology
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/517—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers
    • H10D64/518—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers characterised by their lengths or sectional shapes
    • H10P32/1408—
    • H10P32/141—
    • H10P32/1414—
    • H10P32/171—
    • H10P76/40—
JP57183016A 1981-12-30 1982-10-20 電界効果トランジスタの形成方法 Granted JPS58118158A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/335,892 US4419810A (en) 1981-12-30 1981-12-30 Self-aligned field effect transistor process
US335892 1994-11-08

Publications (2)

Publication Number Publication Date
JPS58118158A JPS58118158A (ja) 1983-07-14
JPH045265B2 true JPH045265B2 (enExample) 1992-01-30

Family

ID=23313657

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57183016A Granted JPS58118158A (ja) 1981-12-30 1982-10-20 電界効果トランジスタの形成方法

Country Status (4)

Country Link
US (1) US4419810A (enExample)
EP (1) EP0083785B1 (enExample)
JP (1) JPS58118158A (enExample)
DE (1) DE3277342D1 (enExample)

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KR900000065B1 (ko) * 1985-08-13 1990-01-19 가부시끼가이샤 도오시바 독출전용 반도체기억장치와 그 제조방법
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US4677736A (en) * 1986-04-17 1987-07-07 General Electric Company Self-aligned inlay transistor with or without source and drain self-aligned metallization extensions
JP2537936B2 (ja) * 1986-04-23 1996-09-25 エイ・ティ・アンド・ティ・コーポレーション 半導体デバイスの製作プロセス
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US5063168A (en) * 1986-07-02 1991-11-05 National Semiconductor Corporation Process for making bipolar transistor with polysilicon stringer base contact
JPS6370572A (ja) * 1986-09-12 1988-03-30 Nec Corp Ｍｏｓ電界効果トランジスタの製造方法
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US5089863A (en) * 1988-09-08 1992-02-18 Mitsubishi Denki Kabushiki Kaisha Field effect transistor with T-shaped gate electrode
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JP2508818B2 (ja) * 1988-10-03 1996-06-19 三菱電機株式会社 半導体装置の製造方法
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EP0394597A1 (en) * 1989-04-28 1990-10-31 International Business Machines Corporation Follow-up System for Monitoring the Etching Process in an RIE Equipment and its Application to Producing High-resolution and Reproducible Patterns
US5223914A (en) * 1989-04-28 1993-06-29 International Business Machines Corporation Follow-up system for etch process monitoring
US5238857A (en) * 1989-05-20 1993-08-24 Fujitsu Limited Method of fabricating a metal-oxide-semiconductor device having a semiconductor on insulator (SOI) structure
JPH02312244A (ja) * 1989-05-26 1990-12-27 Mitsubishi Electric Corp 半導体装置の製造方法
US5208471A (en) * 1989-06-12 1993-05-04 Hitachi, Ltd. Semiconductor device and manufacturing method therefor
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JP2746289B2 (ja) * 1989-09-09 1998-05-06 忠弘 大見 素子の作製方法並びに半導体素子およびその作製方法
US5012306A (en) * 1989-09-22 1991-04-30 Board Of Regents, The University Of Texas System Hot-carrier suppressed sub-micron MISFET device
US5093275A (en) * 1989-09-22 1992-03-03 The Board Of Regents, The University Of Texas System Method for forming hot-carrier suppressed sub-micron MISFET device
US5116778A (en) * 1990-02-05 1992-05-26 Advanced Micro Devices, Inc. Dopant sources for cmos device
US5028557A (en) * 1990-08-27 1991-07-02 Taiwan Semiconductor Manufacturing Co., Ltd. Method of making a reverse self-aligned BIMOS transistor integrated circuit
US5071780A (en) * 1990-08-27 1991-12-10 Taiwan Semiconductor Manufacturing Company, Ltd. Reverse self-aligned transistor integrated circuit
US5175606A (en) * 1990-08-27 1992-12-29 Taiwan Semiconductor Manufacturing Company Reverse self-aligned BiMOS transistor integrated circuit
US5235204A (en) * 1990-08-27 1993-08-10 Taiwan Semiconductor Manufacturing Company Reverse self-aligned transistor integrated circuit
US5279976A (en) * 1991-05-03 1994-01-18 Motorola, Inc. Method for fabricating a semiconductor device having a shallow doped region
JPH0574806A (ja) * 1991-09-13 1993-03-26 Hitachi Ltd 半導体装置及びその製造方法
KR940010564B1 (ko) * 1991-10-10 1994-10-24 금성일렉트론 주식회사 전계효과 트랜지스터 및 그 제조방법
US5196357A (en) * 1991-11-18 1993-03-23 Vlsi Technology, Inc. Method of making extended polysilicon self-aligned gate overlapped lightly doped drain structure for submicron transistor
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KR960012259B1 (ko) * 1993-03-13 1996-09-18 삼성전자 주식회사 반도체 장치의 제조방법
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JP2015228418A (ja) * 2014-05-30 2015-12-17 ルネサスエレクトロニクス株式会社 半導体集積回路装置およびその製造方法
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Also Published As

Publication number Publication date
DE3277342D1 (en) 1987-10-22
EP0083785A3 (en) 1985-01-23
JPS58118158A (ja) 1983-07-14
US4419810A (en) 1983-12-13
EP0083785A2 (en) 1983-07-20
EP0083785B1 (en) 1987-09-16

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