JPH0441646Y2 - - Google Patents

Info

Publication number
JPH0441646Y2
JPH0441646Y2 JP1988077358U JP7735888U JPH0441646Y2 JP H0441646 Y2 JPH0441646 Y2 JP H0441646Y2 JP 1988077358 U JP1988077358 U JP 1988077358U JP 7735888 U JP7735888 U JP 7735888U JP H0441646 Y2 JPH0441646 Y2 JP H0441646Y2
Authority
JP
Japan
Prior art keywords
storage means
speed
length
gating
samples
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1988077358U
Other languages
English (en)
Japanese (ja)
Other versions
JPS648860U (
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS648860U publication Critical patent/JPS648860U/ja
Application granted granted Critical
Publication of JPH0441646Y2 publication Critical patent/JPH0441646Y2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/05Electric or magnetic storage of signals before transmitting or retransmitting for changing the transmission rate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Reduction Or Emphasis Of Bandwidth Of Signals (AREA)
  • Arrangements For Transmission Of Measured Signals (AREA)
  • Pulse Circuits (AREA)
JP1988077358U 1979-11-23 1988-06-13 Expired JPH0441646Y2 ( )

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/096,690 US4316061A (en) 1979-11-23 1979-11-23 Minimal delay rate-change circuits

Publications (2)

Publication Number Publication Date
JPS648860U JPS648860U ( ) 1989-01-18
JPH0441646Y2 true JPH0441646Y2 ( ) 1992-09-30

Family

ID=22258604

Family Applications (2)

Application Number Title Priority Date Filing Date
JP16347080A Pending JPS5693446A (en) 1979-11-23 1980-11-21 Speed varying circuit
JP1988077358U Expired JPH0441646Y2 ( ) 1979-11-23 1988-06-13

Family Applications Before (1)

Application Number Title Priority Date Filing Date
JP16347080A Pending JPS5693446A (en) 1979-11-23 1980-11-21 Speed varying circuit

Country Status (9)

Country Link
US (1) US4316061A ( )
JP (2) JPS5693446A ( )
CA (1) CA1164112A ( )
DE (1) DE3044037C2 ( )
FR (1) FR2470494B1 ( )
GB (1) GB2064921B ( )
IT (1) IT1134421B ( )
NL (1) NL185644C ( )
SE (1) SE456296B ( )

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4410981A (en) * 1981-01-28 1983-10-18 Rca Corporation Simplified transmission system for sequential time-compression of two signals
GB2109197B (en) * 1981-10-13 1985-12-04 Standard Telephones Cables Ltd Radio system
GB2132856B (en) * 1982-10-29 1986-09-10 Matsushita Electric Ind Co Ltd Signal conversion method and video tape recorder employing the same method
FR2547080B1 (fr) * 1983-06-03 1985-08-30 Europ Agence Spatiale Procede et dispositif de verification du fonctionnement d'equipements numeriques fournissant un train de donnees a frequence elevee
NL8500841A (nl) * 1985-03-22 1986-10-16 Philips Nv Kodeer- of dekodeerschakeling voor tijdmultiplex en simultane signalen.
US5978831A (en) * 1991-03-07 1999-11-02 Lucent Technologies Inc. Synchronous multiprocessor using tasks directly proportional in size to the individual processors rates
US5940437A (en) * 1995-01-03 1999-08-17 Intel Corporation System and method for reducing the peak load on the processor of a block processing modem
FI100928B (fi) * 1996-07-05 1998-03-13 Nokia Telecommunications Oy Tiedonsiirtomenetelmä
US6836852B2 (en) 2001-10-29 2004-12-28 Agilent Technologies, Inc. Method for synchronizing multiple serial data streams using a plurality of clock signals

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3135947A (en) * 1960-06-15 1964-06-02 Collins Radio Corp Variable bit-rate converter
GB1017591A (en) * 1961-07-07 1966-01-19 Ass Elect Ind Improvements relating to multiplex transmission systems
US3781822A (en) * 1972-08-09 1973-12-25 Bell Telephone Labor Inc Data rate-changing and reordering circuits
JPS5727627B2 ( ) * 1972-08-28 1982-06-11
US3975763A (en) * 1973-04-30 1976-08-17 Victor Company Of Japan, Limited Signal time compression or expansion system
US4210781A (en) * 1977-12-16 1980-07-01 Sanyo Electric Co., Ltd. Sound synthesizing apparatus

Also Published As

Publication number Publication date
FR2470494A1 (fr) 1981-05-29
GB2064921B (en) 1984-02-08
IT8026177A0 (it) 1980-11-21
JPS648860U ( ) 1989-01-18
GB2064921A (en) 1981-06-17
US4316061A (en) 1982-02-16
NL8006374A (nl) 1981-06-16
SE8008083L (sv) 1981-05-24
CA1164112A (en) 1984-03-20
NL185644B (nl) 1990-01-02
DE3044037A1 (de) 1981-05-27
FR2470494B1 (fr) 1985-10-25
NL185644C (nl) 1990-06-01
SE456296B (sv) 1988-09-19
DE3044037C2 (de) 1985-06-27
IT1134421B (it) 1986-08-13
JPS5693446A (en) 1981-07-29

Similar Documents

Publication Publication Date Title
US4429386A (en) Buffer arrangement of a PCM exchange system
JPH0441646Y2 ( )
JPS6247008B2 ( )
US4481648A (en) Method and system for producing a synchronous signal from _cyclic-redundancy-coded digital data blocks
CN1829129B (zh) 消除多路同步数据传输中的传输延时差异的方法和装置
JPH04211535A (ja) 特定フレーム構造体への情報ビットの挿入装置
JPH0779211A (ja) マルチプレクサのための制御回路
JP2734782B2 (ja) スタッフ多重化装置のクロック平滑回路
JPS5941336B2 (ja) バツフアメモリ装置
JPH02141139A (ja) データ伝送装置
JP2655509B2 (ja) シリアル/パラレル変換回路
JP2601219B2 (ja) 多重化装置
JPS6129226A (ja) チヤネルデ−タ分離装置
SU1688440A1 (ru) Частотный манипул тор
JP2508291B2 (ja) シリアル入出力回路
SU1531135A1 (ru) Способ компенсации фазовых сдвигов при многоканальном воспроизведении информации и устройство дл его осуществлени
JP2822912B2 (ja) 遅延設定システム
JP2584915B2 (ja) 接続回路
JP2003060610A (ja) 時間インターリーブ方法および時間デインターリーブ方法
JPH03267843A (ja) 伝送路の遅延補正方式
JPH05308353A (ja) クロック信号の伝送方法
JPH03206798A (ja) データ列変換方式
JPS60236351A (ja) 複数音送出デイジタルト−ン発生器
JPH11184808A (ja) シリアル通信方法
JPH04369029A (ja) スタッフ同期回路におけるメモリ制御方式