JPH0379799B2 - - Google Patents

Info

Publication number
JPH0379799B2
JPH0379799B2 JP57163887A JP16388782A JPH0379799B2 JP H0379799 B2 JPH0379799 B2 JP H0379799B2 JP 57163887 A JP57163887 A JP 57163887A JP 16388782 A JP16388782 A JP 16388782A JP H0379799 B2 JPH0379799 B2 JP H0379799B2
Authority
JP
Japan
Prior art keywords
address
signal
timing signal
column
decoder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57163887A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5954096A (ja
Inventor
Tetsuo Matsumoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP57163887A priority Critical patent/JPS5954096A/ja
Priority to KR1019830003037A priority patent/KR840005885A/ko
Priority to FR838312878A priority patent/FR2533349B1/fr
Priority to GB08324526A priority patent/GB2127596A/en
Priority to DE19833333974 priority patent/DE3333974A1/de
Priority to IT22952/83A priority patent/IT1168282B/it
Publication of JPS5954096A publication Critical patent/JPS5954096A/ja
Publication of JPH0379799B2 publication Critical patent/JPH0379799B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G11C11/4082—Address Buffers; level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
JP57163887A 1982-09-22 1982-09-22 ダイナミツク型ｍｏｓｒａｍ Granted JPS5954096A (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP57163887A JPS5954096A (ja) 1982-09-22 1982-09-22 ダイナミツク型ｍｏｓｒａｍ
KR1019830003037A KR840005885A (ko) 1982-09-22 1983-07-04 다이나믹형 mosram
FR838312878A FR2533349B1 (fr) 1982-09-22 1983-08-04 Memoire mosram de type dynamique
GB08324526A GB2127596A (en) 1982-09-22 1983-09-13 Dynamic type MOSRAM
DE19833333974 DE3333974A1 (de) 1982-09-22 1983-09-20 Dynamischer mos-speicher mit wahlfreiem zugriff
IT22952/83A IT1168282B (it) 1982-09-22 1983-09-21 Memoria ad accesso casuale di tipo mos

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57163887A JPS5954096A (ja) 1982-09-22 1982-09-22 ダイナミツク型ｍｏｓｒａｍ

Publications (2)

Publication Number Publication Date
JPS5954096A JPS5954096A (ja) 1984-03-28
JPH0379799B2 true JPH0379799B2 (ko) 1991-12-19

Family

ID=15782682

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57163887A Granted JPS5954096A (ja) 1982-09-22 1982-09-22 ダイナミツク型ｍｏｓｒａｍ

Country Status (6)

Country Link
JP (1) JPS5954096A (ko)
KR (1) KR840005885A (ko)
DE (1) DE3333974A1 (ko)
FR (1) FR2533349B1 (ko)
GB (1) GB2127596A (ko)
IT (1) IT1168282B (ko)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3427454A1 (de) * 1984-07-25 1986-01-30 Siemens AG, 1000 Berlin und 8000 München Integrierte schaltung fuer einen in komplementaerer schaltungstechnik aufgebauten dynamischen halbleiterspeicher
JPS6212991A (ja) * 1985-07-10 1987-01-21 Fujitsu Ltd 半導体記憶装置
US4792929A (en) * 1987-03-23 1988-12-20 Zenith Electronics Corporation Data processing system with extended memory access
US5173878A (en) * 1987-11-25 1992-12-22 Kabushiki Kaisha Toshiba Semiconductor memory including address multiplexing circuitry for changing the order of supplying row and column addresses between read and write cycles
KR930008838A (ko) * 1991-10-31 1993-05-22 김광호 어드레스 입력 버퍼
KR0120592B1 (ko) * 1994-09-09 1997-10-20 김주용 신호 변환 장치를 갖고 있는 어드레스 입력버퍼
KR0145852B1 (ko) * 1995-04-14 1998-11-02 김광호 반도체메모리소자의 어드레스버퍼
GB9902561D0 (en) * 1999-02-06 1999-03-24 Mitel Semiconductor Ltd Synchronous memory
KR102465540B1 (ko) 2017-05-18 2022-11-11 삼성전자주식회사 약액 공급 장치 및 이를 구비하는 반도체 처리 장치

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5325324A (en) * 1976-08-23 1978-03-09 Hitachi Ltd Address selection system
JPS5381021A (en) * 1976-12-27 1978-07-18 Nippon Telegr & Teleph Corp <Ntt> Address input circuit

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5575899U (ko) * 1978-11-20 1980-05-24
JPS57118599U (ko) * 1981-01-14 1982-07-23
US4541078A (en) * 1982-12-22 1985-09-10 At&T Bell Laboratories Memory using multiplexed row and column address lines

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5325324A (en) * 1976-08-23 1978-03-09 Hitachi Ltd Address selection system
JPS5381021A (en) * 1976-12-27 1978-07-18 Nippon Telegr & Teleph Corp <Ntt> Address input circuit

Also Published As

Publication number Publication date
IT8322952A1 (it) 1985-03-21
KR840005885A (ko) 1984-11-19
GB8324526D0 (en) 1983-10-12
DE3333974A1 (de) 1984-03-22
IT8322952A0 (it) 1983-09-21
FR2533349B1 (fr) 1991-09-06
JPS5954096A (ja) 1984-03-28
GB2127596A (en) 1984-04-11
IT1168282B (it) 1987-05-20
FR2533349A1 (fr) 1984-03-23

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