JPH0361276B2 - - Google Patents

Info

Publication number
JPH0361276B2
JPH0361276B2 JP1516482A JP1516482A JPH0361276B2 JP H0361276 B2 JPH0361276 B2 JP H0361276B2 JP 1516482 A JP1516482 A JP 1516482A JP 1516482 A JP1516482 A JP 1516482A JP H0361276 B2 JPH0361276 B2 JP H0361276B2
Authority
JP
Japan
Prior art keywords
shift register
input
memory cell
shift
information
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1516482A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58133698A (ja
Inventor
Toshio Takeshima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP57015164A priority Critical patent/JPS58133698A/ja
Publication of JPS58133698A publication Critical patent/JPS58133698A/ja
Publication of JPH0361276B2 publication Critical patent/JPH0361276B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers

Landscapes

  • Static Random-Access Memory (AREA)
  • Memory System (AREA)
JP57015164A 1982-02-02 1982-02-02 半導体メモリ装置 Granted JPS58133698A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57015164A JPS58133698A (ja) 1982-02-02 1982-02-02 半導体メモリ装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57015164A JPS58133698A (ja) 1982-02-02 1982-02-02 半導体メモリ装置

Publications (2)

Publication Number Publication Date
JPS58133698A JPS58133698A (ja) 1983-08-09
JPH0361276B2 true JPH0361276B2 (en, 2012) 1991-09-19

Family

ID=11881156

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57015164A Granted JPS58133698A (ja) 1982-02-02 1982-02-02 半導体メモリ装置

Country Status (1)

Country Link
JP (1) JPS58133698A (en, 2012)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4649516A (en) * 1984-06-01 1987-03-10 International Business Machines Corp. Dynamic row buffer circuit for DRAM
JPS61117789A (ja) * 1984-11-13 1986-06-05 Nec Corp 半導体メモリ
US4796222A (en) * 1985-10-28 1989-01-03 International Business Machines Corporation Memory structure for nonsequential storage of block bytes in multi-bit chips
JPS62252590A (ja) * 1986-04-24 1987-11-04 Ascii Corp メモリ装置
CA1293565C (en) * 1986-04-28 1991-12-24 Norio Ebihara Semiconductor memory
JPH07101551B2 (ja) * 1986-05-06 1995-11-01 ソニー株式会社 映像記憶装置
JPS62271291A (ja) * 1986-05-20 1987-11-25 Ascii Corp メモリ装置
JP2728395B2 (ja) * 1986-09-26 1998-03-18 株式会社日立製作所 半導体記憶装置
JPH01213889A (ja) * 1987-05-27 1989-08-28 Mitsubishi Electric Corp 半導体記憶装置
JPS63311697A (ja) * 1987-06-15 1988-12-20 Hitachi Ltd 半導体記憶装置
JPH02172097A (ja) * 1988-12-23 1990-07-03 Nec Corp メモリ
JPH0743928B2 (ja) * 1989-09-22 1995-05-15 株式会社東芝 画像メモリ
JPH07122988B2 (ja) * 1993-07-30 1995-12-25 沖電気工業株式会社 半導体記憶回路

Also Published As

Publication number Publication date
JPS58133698A (ja) 1983-08-09

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