JPH0315348B2 - - Google Patents

Info

Publication number
JPH0315348B2
JPH0315348B2 JP59008721A JP872184A JPH0315348B2 JP H0315348 B2 JPH0315348 B2 JP H0315348B2 JP 59008721 A JP59008721 A JP 59008721A JP 872184 A JP872184 A JP 872184A JP H0315348 B2 JPH0315348 B2 JP H0315348B2
Authority
JP
Japan
Prior art keywords
well
substrate
source
conductivity type
impurity layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59008721A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60152055A (ja
Inventor
Kazuhiko Tsuji
Seiji Yamaguchi
Eisuke Ichinohe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP59008721A priority Critical patent/JPS60152055A/ja
Priority to US06/691,701 priority patent/US4672584A/en
Priority to KR1019850000281A priority patent/KR890004472B1/ko
Publication of JPS60152055A publication Critical patent/JPS60152055A/ja
Publication of JPH0315348B2 publication Critical patent/JPH0315348B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85Complementary IGFETs, e.g. CMOS
    • H10D84/854Complementary IGFETs, e.g. CMOS comprising arrangements for preventing bipolar actions between the different IGFET regions, e.g. arrangements for latchup prevention
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85Complementary IGFETs, e.g. CMOS
    • H10D84/859Complementary IGFETs, e.g. CMOS comprising both N-type and P-type wells, e.g. twin-tub
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0181Manufacturing their gate insulating layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0191Manufacturing their doped wells
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/201Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits
    • H10D84/204Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors
    • H10D84/206Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors of combinations of capacitors and resistors

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP59008721A 1984-01-20 1984-01-20 相補型mos半導体装置 Granted JPS60152055A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP59008721A JPS60152055A (ja) 1984-01-20 1984-01-20 相補型mos半導体装置
US06/691,701 US4672584A (en) 1984-01-20 1985-01-15 CMOS integrated circuit
KR1019850000281A KR890004472B1 (ko) 1984-01-20 1985-01-18 Cmos 집적회호

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59008721A JPS60152055A (ja) 1984-01-20 1984-01-20 相補型mos半導体装置

Publications (2)

Publication Number Publication Date
JPS60152055A JPS60152055A (ja) 1985-08-10
JPH0315348B2 true JPH0315348B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1991-02-28

Family

ID=11700810

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59008721A Granted JPS60152055A (ja) 1984-01-20 1984-01-20 相補型mos半導体装置

Country Status (3)

Country Link
US (1) US4672584A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JPS60152055A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
KR (1) KR890004472B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60231356A (ja) * 1984-04-28 1985-11-16 Mitsubishi Electric Corp 相補形金属酸化膜半導体集積回路装置
US4908688A (en) * 1986-03-14 1990-03-13 Motorola, Inc. Means and method for providing contact separation in silicided devices
JPS63278248A (ja) * 1987-03-13 1988-11-15 Fujitsu Ltd ゲ−トアレイの基本セル
JP2722453B2 (ja) * 1987-06-08 1998-03-04 三菱電機株式会社 半導体装置
JPH0713871B2 (ja) * 1987-06-11 1995-02-15 三菱電機株式会社 ダイナミツクram
JPS648659A (en) * 1987-06-30 1989-01-12 Mitsubishi Electric Corp Supplementary semiconductor integrated circuit device
US5117274A (en) * 1987-10-06 1992-05-26 Motorola, Inc. Merged complementary bipolar and MOS means and method
US4947228A (en) * 1988-09-20 1990-08-07 At&T Bell Laboratories Integrated circuit power supply contact
US5274262A (en) * 1989-05-17 1993-12-28 David Sarnoff Research Center, Inc. SCR protection structure and circuit with reduced trigger voltage
US5072273A (en) * 1990-05-04 1991-12-10 David Sarnoff Research Center, Inc. Low trigger voltage SCR protection device and structure
US5003362A (en) * 1989-07-28 1991-03-26 Dallas Semiconductor Corporation Integrated circuit with high-impedance well tie
US5021858A (en) * 1990-05-25 1991-06-04 Hall John H Compound modulated integrated transistor structure
US5317183A (en) * 1991-09-03 1994-05-31 International Business Machines Corporation Substrate noise coupling reduction for VLSI applications with mixed analog and digital circuitry
JP3184298B2 (ja) * 1992-05-28 2001-07-09 沖電気工業株式会社 Cmos出力回路
JPH09199607A (ja) * 1996-01-18 1997-07-31 Nec Corp Cmos半導体装置
US5883566A (en) * 1997-02-24 1999-03-16 International Business Machines Corporation Noise-isolated buried resistor
GB2394833B (en) * 2000-08-11 2005-03-16 Samsung Electronics Co Ltd Protection device with a silicon controlled rectifier
US7132696B2 (en) 2002-08-28 2006-11-07 Micron Technology, Inc. Intermeshed guard bands for multiple voltage supply structures on an integrated circuit, and methods of making same
US7773442B2 (en) * 2004-06-25 2010-08-10 Cypress Semiconductor Corporation Memory cell array latchup prevention
US9842629B2 (en) 2004-06-25 2017-12-12 Cypress Semiconductor Corporation Memory cell array latchup prevention
FR2872630B1 (fr) * 2004-07-01 2006-12-01 St Microelectronics Sa Circuit integre tolerant au phenomene de verrouillage
JP5135815B2 (ja) * 2006-02-14 2013-02-06 ミツミ電機株式会社 半導体集積回路装置
US7834428B2 (en) * 2007-02-28 2010-11-16 Freescale Semiconductor, Inc. Apparatus and method for reducing noise in mixed-signal circuits and digital circuits
KR102248282B1 (ko) * 2014-01-21 2021-05-06 삼성전자주식회사 Cmos 반도체 장치
US10410934B2 (en) * 2017-12-07 2019-09-10 Micron Technology, Inc. Apparatuses having an interconnect extending from an upper conductive structure, through a hole in another conductive structure, and to an underlying structure
US10861848B2 (en) * 2018-08-23 2020-12-08 Xilinx, Inc. Single event latch-up (SEL) mitigation techniques
EP3944316A1 (en) * 2020-07-21 2022-01-26 Nexperia B.V. An electrostatic discharge protection semiconductor structure and a method of manufacture

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5910587B2 (ja) * 1977-08-10 1984-03-09 株式会社日立製作所 半導体装置の保護装置
JPS5939904B2 (ja) * 1978-09-28 1984-09-27 株式会社東芝 半導体装置
JPS6046545B2 (ja) * 1980-05-16 1985-10-16 日本電気株式会社 相補型mos記憶回路装置

Also Published As

Publication number Publication date
US4672584A (en) 1987-06-09
JPS60152055A (ja) 1985-08-10
KR890004472B1 (ko) 1989-11-04
KR850005736A (ko) 1985-08-28

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term