JPH0229540U - - Google Patents
Info
- Publication number
- JPH0229540U JPH0229540U JP1988108790U JP10879088U JPH0229540U JP H0229540 U JPH0229540 U JP H0229540U JP 1988108790 U JP1988108790 U JP 1988108790U JP 10879088 U JP10879088 U JP 10879088U JP H0229540 U JPH0229540 U JP H0229540U
- Authority
- JP
- Japan
- Prior art keywords
- resin layer
- lead wire
- circuit board
- support plate
- thin lead
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000011347 resin Substances 0.000 claims description 9
- 229920005989 resin Polymers 0.000 claims description 9
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 claims description 6
- 239000004065 semiconductor Substances 0.000 claims 4
- 238000010586 diagram Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
- H01L2224/48139—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate with an intermediate bond, e.g. continuous wire daisy chain
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85909—Post-treatment of the connector or wire bonding area
- H01L2224/8592—Applying permanent coating, e.g. protective coating
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
第1図は本考案の一実施例に係わる電力用ハイ
ブリツドICを示す第2図の―線縦断面図、
第2図は第1図の電力用ハイブリツドICの平面
図、第3図は第1図の電力用ハイブリツドICを
使用したスイツチングレギユレータを示す回路図
、第4図は従来の電力用ハイブリツドICを示す
平面図、第5図は第4図の―線断面図である
。 1…支持板、2…パワートランジスタチツプ、
4〜8…外部リード、31…回路基板、32…リ
ード細線、35…保護樹脂、36…樹脂封止体。
ブリツドICを示す第2図の―線縦断面図、
第2図は第1図の電力用ハイブリツドICの平面
図、第3図は第1図の電力用ハイブリツドICを
使用したスイツチングレギユレータを示す回路図
、第4図は従来の電力用ハイブリツドICを示す
平面図、第5図は第4図の―線断面図である
。 1…支持板、2…パワートランジスタチツプ、
4〜8…外部リード、31…回路基板、32…リ
ード細線、35…保護樹脂、36…樹脂封止体。
Claims (1)
- 【実用新案登録請求の範囲】 支持板と、該支持板の一端側に配置された外部
リードと、前記支持板に固着された半導体素子及
び回路基板とを有し、前記半導体素子が前記外部
リードに対してリード細線を介して接続されてお
り、前記支持板及び前記外部リードの端部が外囲
体によつて被覆されている半導体装置において、 前記リード細線は前記回路基板に対して少なく
とも2点で固着されており、前記回路基板の上面
には前記リード細線の前記2点を両端とする区間
を被覆するように第1の樹脂層が形成されており
、前記第1の樹脂層の外周側には前記リード細線
の前記区間を除く部分を被覆する前記外囲体の一
部もしくは前記外囲体とは異なる第2の樹脂層が
形成されており、前記第1の樹脂層の熱伝導性が
前記第2の樹脂層の熱伝導性よりも低いことを特
徴とする半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1988108790U JPH0627958Y2 (ja) | 1988-08-18 | 1988-08-18 | 半導体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1988108790U JPH0627958Y2 (ja) | 1988-08-18 | 1988-08-18 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0229540U true JPH0229540U (ja) | 1990-02-26 |
JPH0627958Y2 JPH0627958Y2 (ja) | 1994-07-27 |
Family
ID=31344457
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1988108790U Expired - Lifetime JPH0627958Y2 (ja) | 1988-08-18 | 1988-08-18 | 半導体装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0627958Y2 (ja) |
-
1988
- 1988-08-18 JP JP1988108790U patent/JPH0627958Y2/ja not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH0627958Y2 (ja) | 1994-07-27 |