JPH0476046U - - Google Patents
Info
- Publication number
- JPH0476046U JPH0476046U JP1990119868U JP11986890U JPH0476046U JP H0476046 U JPH0476046 U JP H0476046U JP 1990119868 U JP1990119868 U JP 1990119868U JP 11986890 U JP11986890 U JP 11986890U JP H0476046 U JPH0476046 U JP H0476046U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- resin
- power semiconductor
- insulating layer
- lead frame
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 7
- 239000011347 resin Substances 0.000 claims description 2
- 229920005989 resin Polymers 0.000 claims description 2
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
第1図a及びbはそれぞれ、本考案の一実施例
による電力半導体装置の平面図及び側面図、第2
図a及びbはそれぞれ、本考案の他の実施例によ
る電力半導体装置の平面図及び側面図、第3図a
及びbはそれぞれ、従来例による電力半導体装置
の平面図及び側面図である。 1……リードフレーム、2……半導体素子、3
……電子部品、4……樹脂、9……絶縁層。
による電力半導体装置の平面図及び側面図、第2
図a及びbはそれぞれ、本考案の他の実施例によ
る電力半導体装置の平面図及び側面図、第3図a
及びbはそれぞれ、従来例による電力半導体装置
の平面図及び側面図である。 1……リードフレーム、2……半導体素子、3
……電子部品、4……樹脂、9……絶縁層。
Claims (1)
- 【実用新案登録請求の範囲】 リードフレーム上に半導体素子及び電子部品が
搭載され、これらが樹脂によつて樹脂封止されて
なる電力半導体装置において、 前記リードフレーム下面に絶縁層を形成し、該
絶縁層を含めて樹脂封止してなることを特徴とす
る電力半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1990119868U JPH0476046U (ja) | 1990-11-15 | 1990-11-15 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1990119868U JPH0476046U (ja) | 1990-11-15 | 1990-11-15 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0476046U true JPH0476046U (ja) | 1992-07-02 |
Family
ID=31867800
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1990119868U Pending JPH0476046U (ja) | 1990-11-15 | 1990-11-15 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0476046U (ja) |
-
1990
- 1990-11-15 JP JP1990119868U patent/JPH0476046U/ja active Pending