JPH0270450U - - Google Patents
Info
- Publication number
- JPH0270450U JPH0270450U JP1988148420U JP14842088U JPH0270450U JP H0270450 U JPH0270450 U JP H0270450U JP 1988148420 U JP1988148420 U JP 1988148420U JP 14842088 U JP14842088 U JP 14842088U JP H0270450 U JPH0270450 U JP H0270450U
- Authority
- JP
- Japan
- Prior art keywords
- opening
- ceramic substrate
- lead frame
- semiconductor element
- fixed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
- H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Description
第１図は本考案による一例の半導体装置の断面
図、第２図は第１図に示す半導体装置の裏面の平
面図、第３図は本考案の半導体装置の他の実施例
を示す断面図、第４図は第３図に示す半導体装置
の裏面の平面図、第５図は樹脂封止パツケージを
用いた半導体装置を示す図、第６図は第５図に示
す半導体装置の断面図、第７図はメタルキヤンパ
ツケージを用いた半導体装置の断面図である。
図、第２図は第１図に示す半導体装置の裏面の平
面図、第３図は本考案の半導体装置の他の実施例
を示す断面図、第４図は第３図に示す半導体装置
の裏面の平面図、第５図は樹脂封止パツケージを
用いた半導体装置を示す図、第６図は第５図に示
す半導体装置の断面図、第７図はメタルキヤンパ
ツケージを用いた半導体装置の断面図である。
Claims (1)
- 開口部を有するセラミツク基板と、前記セラミ
ツク基板の一主面に固着され、前記開口部を塞ぐ
ように設けられたリードフレームと、前記開口部
において前記リードフレーム上に搭載された半導
体素子と、前記半導体素子を覆い前記セラミツク
基板に固着された蓋体とを有する半導体装置。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988148420U JPH0270450U (ja) | 1988-11-16 | 1988-11-16 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988148420U JPH0270450U (ja) | 1988-11-16 | 1988-11-16 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0270450U true JPH0270450U (ja) | 1990-05-29 |
Family
ID=31419731
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1988148420U Pending JPH0270450U (ja) | 1988-11-16 | 1988-11-16 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0270450U (ja) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2014011435A (ja) * | 2012-07-03 | 2014-01-20 | Nippon Steel & Sumikin Electronics Devices Inc | セラミック複合基板 |
| JP2016174094A (ja) * | 2015-03-17 | 2016-09-29 | 住友電工デバイス・イノベーション株式会社 | 半導体組立体 |
-
1988
- 1988-11-16 JP JP1988148420U patent/JPH0270450U/ja active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2014011435A (ja) * | 2012-07-03 | 2014-01-20 | Nippon Steel & Sumikin Electronics Devices Inc | セラミック複合基板 |
| JP2016174094A (ja) * | 2015-03-17 | 2016-09-29 | 住友電工デバイス・イノベーション株式会社 | 半導体組立体 |