JPS6294643U - - Google Patents

Info

Publication number
JPS6294643U
JPS6294643U JP1985186897U JP18689785U JPS6294643U JP S6294643 U JPS6294643 U JP S6294643U JP 1985186897 U JP1985186897 U JP 1985186897U JP 18689785 U JP18689785 U JP 18689785U JP S6294643 U JPS6294643 U JP S6294643U
Authority
JP
Japan
Prior art keywords
semiconductor device
power semiconductor
heatsink
semiconductor element
external
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1985186897U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1985186897U priority Critical patent/JPS6294643U/ja
Publication of JPS6294643U publication Critical patent/JPS6294643U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/2612Auxiliary members for layer connectors, e.g. spacers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Description

【図面の簡単な説明】
第1図は本考案に係る電力半導体装置の一実施
例の断面図、第2図及び第3図は夫々異なる従来
例を示す断面図である。 5:半導体素子、8:外部放熱板、13:絶縁
層、16:内部銅回路。

Claims (1)

    【実用新案登録請求の範囲】
  1. 放熱器を備えた樹脂封止型の電力半導体装置に
    おいて、外部放熱板と、装置内部に設けられ半導
    体素子が搭載される内部銅回路とを備え、該内部
    銅回路は前記半導体素子が直接搭載可能な熱容量
    を有する厚い銅板により所定の回路が形成され、
    かつ前記外部放熱板上に絶縁層を介して配置・接
    合されてなることを特徴とする電力半導体装置。
JP1985186897U 1985-12-02 1985-12-02 Pending JPS6294643U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1985186897U JPS6294643U (ja) 1985-12-02 1985-12-02

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1985186897U JPS6294643U (ja) 1985-12-02 1985-12-02

Publications (1)

Publication Number Publication Date
JPS6294643U true JPS6294643U (ja) 1987-06-17

Family

ID=31136876

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1985186897U Pending JPS6294643U (ja) 1985-12-02 1985-12-02

Country Status (1)

Country Link
JP (1) JPS6294643U (ja)

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