JPH0330443U - - Google Patents

Info

Publication number
JPH0330443U
JPH0330443U JP1989089827U JP8982789U JPH0330443U JP H0330443 U JPH0330443 U JP H0330443U JP 1989089827 U JP1989089827 U JP 1989089827U JP 8982789 U JP8982789 U JP 8982789U JP H0330443 U JPH0330443 U JP H0330443U
Authority
JP
Japan
Prior art keywords
conductor
internal conductor
semiconductor
semiconductor chip
insulating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1989089827U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989089827U priority Critical patent/JPH0330443U/ja
Publication of JPH0330443U publication Critical patent/JPH0330443U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Description

【図面の簡単な説明】
第1図aは外部端子を接続する以前の状態を示
す本考案の半導体装置の平面図、同図bは外部端
子を接続した上記半導体装置の平面図、第2図a
は第1図bにおけるA方向矢視図、第2図bは第
1図bにおけるB−B方向矢視図、第2図cは第
1図bにおけるC−C方向矢視図、第3図は従来
のこの種の半導体装置の模式図である。 1……放熱基板、2……絶縁基板、3,4……
サイリスタチツプ、8……アノード内部導体、9
……カソード内部導体、10……ゲート内部導体
、8a,9a,10a……折曲部、12……アノ
ード外部端子、13……カソード外部端子、14
……ゲート外部端子。

Claims (1)

    【実用新案登録請求の範囲】
  1. 放熱基板上に両面導体層が形成さえた絶縁基板
    が固着され、この絶縁基板上に複数の半導体チツ
    プが搭載され、この半導体チツプの主面から導出
    された内部導体を有し、この内部導体と接続され
    た外部端子導体を有し、前記半導体チツプおよび
    内部導体を封止する絶縁ケースとを備えた半導体
    装置において、前記放熱基板上に複数の半導体チ
    ツプを絶縁基板を介して左右対称に配置し、前記
    内部導体と外部端子との接続部が前記半導体チツ
    プの左右対称位置の中点になるように配置したこ
    とを特徴とする半導体装置。
JP1989089827U 1989-08-01 1989-08-01 Pending JPH0330443U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989089827U JPH0330443U (ja) 1989-08-01 1989-08-01

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989089827U JPH0330443U (ja) 1989-08-01 1989-08-01

Publications (1)

Publication Number Publication Date
JPH0330443U true JPH0330443U (ja) 1991-03-26

Family

ID=31639385

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989089827U Pending JPH0330443U (ja) 1989-08-01 1989-08-01

Country Status (1)

Country Link
JP (1) JPH0330443U (ja)

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