JPH01108951U - - Google Patents
Info
- Publication number
- JPH01108951U JPH01108951U JP356188U JP356188U JPH01108951U JP H01108951 U JPH01108951 U JP H01108951U JP 356188 U JP356188 U JP 356188U JP 356188 U JP356188 U JP 356188U JP H01108951 U JPH01108951 U JP H01108951U
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- power
- power semiconductor
- control circuit
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 5
- 239000011347 resin Substances 0.000 claims description 4
- 229920005989 resin Polymers 0.000 claims description 4
- 238000002347 injection Methods 0.000 claims 1
- 239000007924 injection Substances 0.000 claims 1
- 239000007788 liquid Substances 0.000 claims 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
第１図は本考案の一実施例を示す断面図、第２
図は平面図、第３図は従来例を示す断面図である
。 １…ケース、２…電力回路基板、３…制御回路
基板、４…電力用半導体素子、５…アルミワイヤ
ー、６…電気部品、９…保護用樹脂、１０…封止
樹脂、１２…空気層。
図は平面図、第３図は従来例を示す断面図である
。 １…ケース、２…電力回路基板、３…制御回路
基板、４…電力用半導体素子、５…アルミワイヤ
ー、６…電気部品、９…保護用樹脂、１０…封止
樹脂、１２…空気層。
Claims (1)
- 【実用新案登録請求の範囲】 電力用半導体素子が搭載された電力回路基板と
、各種の電気部品が搭載された制御回路基板とを
液状樹脂注入用のケースにより積層保持してなる
電力半導体装置において、 前記電力回路基板上の半導体素子保護用樹脂と
、前記制御回路基板との間に、空気層が形成され
る空間部を設けたことを特徴とする電力半導体装
置。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP356188U JPH01108951U (ja) | 1988-01-14 | 1988-01-14 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP356188U JPH01108951U (ja) | 1988-01-14 | 1988-01-14 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01108951U true JPH01108951U (ja) | 1989-07-24 |
Family
ID=31205304
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP356188U Pending JPH01108951U (ja) | 1988-01-14 | 1988-01-14 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01108951U (ja) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04354359A (ja) * | 1991-05-31 | 1992-12-08 | Nippondenso Co Ltd | 電子装置 |
| JP2000228492A (ja) * | 1999-02-05 | 2000-08-15 | Hitachi Ltd | 樹脂封止した半導体装置 |
| WO2016158072A1 (ja) * | 2015-03-27 | 2016-10-06 | 三菱電機株式会社 | パワーモジュール |
-
1988
- 1988-01-14 JP JP356188U patent/JPH01108951U/ja active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04354359A (ja) * | 1991-05-31 | 1992-12-08 | Nippondenso Co Ltd | 電子装置 |
| JP2000228492A (ja) * | 1999-02-05 | 2000-08-15 | Hitachi Ltd | 樹脂封止した半導体装置 |
| WO2016158072A1 (ja) * | 2015-03-27 | 2016-10-06 | 三菱電機株式会社 | パワーモジュール |
| JPWO2016158072A1 (ja) * | 2015-03-27 | 2017-08-17 | 三菱電機株式会社 | パワーモジュール |
| US11011442B2 (en) | 2015-03-27 | 2021-05-18 | Mitsubishi Electric Corporation | Power module |