JPH0231149U - - Google Patents

Info

Publication number
JPH0231149U
JPH0231149U JP1988109037U JP10903788U JPH0231149U JP H0231149 U JPH0231149 U JP H0231149U JP 1988109037 U JP1988109037 U JP 1988109037U JP 10903788 U JP10903788 U JP 10903788U JP H0231149 U JPH0231149 U JP H0231149U
Authority
JP
Japan
Prior art keywords
integrated circuit
synthetic resin
circuit chip
mounting structure
molded
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1988109037U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1988109037U priority Critical patent/JPH0231149U/ja
Publication of JPH0231149U publication Critical patent/JPH0231149U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Description

【図面の簡単な説明】
第1図は本考案の一実施例を示す断面図、第2
図a,b,cは実装手順を説明するための図、第
3図は従来の集積回路の実装構造を示す断面図で
ある。 1……集積回路チツプ、2……シーラーキヤツ
プ、3……電気部品、4……基板、5……ワイヤ
、6……リード線、20……合成樹脂、21……
プレート。

Claims (1)

    【実用新案登録請求の範囲】
  1. 基板上に集積回路チツプを実装し、この集積回
    路チツプを合成樹脂でモールドし、かつ前記合成
    樹脂上に他の電気部品を実装するようにしたこと
    を特徴とする集積回路の実装構造。
JP1988109037U 1988-08-22 1988-08-22 Pending JPH0231149U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1988109037U JPH0231149U (ja) 1988-08-22 1988-08-22

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1988109037U JPH0231149U (ja) 1988-08-22 1988-08-22

Publications (1)

Publication Number Publication Date
JPH0231149U true JPH0231149U (ja) 1990-02-27

Family

ID=31344923

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1988109037U Pending JPH0231149U (ja) 1988-08-22 1988-08-22

Country Status (1)

Country Link
JP (1) JPH0231149U (ja)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6115357A (ja) * 1984-07-02 1986-01-23 Matsushita Electric Ind Co Ltd 複合部品

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6115357A (ja) * 1984-07-02 1986-01-23 Matsushita Electric Ind Co Ltd 複合部品

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