JPH02250103A - Counter instruction executing system of programmable controller - Google Patents

Counter instruction executing system of programmable controller

Info

Publication number
JPH02250103A
JPH02250103A JP30545388A JP30545388A JPH02250103A JP H02250103 A JPH02250103 A JP H02250103A JP 30545388 A JP30545388 A JP 30545388A JP 30545388 A JP30545388 A JP 30545388A JP H02250103 A JPH02250103 A JP H02250103A
Authority
JP
Japan
Prior art keywords
counter
circuit
input signal
stepping
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP30545388A
Other languages
Japanese (ja)
Inventor
Masahiko Fukuda
昌彦 福田
Kengo Ueki
植木 健五
Toshihiko Asai
浅井 利彦
Taiji Kuki
九鬼 泰治
Shigeaki Tani
谷 重明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Keyence Corp
Original Assignee
Keyence Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Keyence Corp filed Critical Keyence Corp
Priority to JP30545388A priority Critical patent/JPH02250103A/en
Publication of JPH02250103A publication Critical patent/JPH02250103A/en
Pending legal-status Critical Current

Links

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  • Programmable Controllers (AREA)

Abstract

PURPOSE:To execute the processing at a high speed by generating each logical value data on an input signal of the previous time and an input signal of this time in the course of executing a counter instruction, writing this logical value data in a temporary storage circuit, and executing the counter instruction, based on a result of decision which is read out of a logic arithmetic circuit. CONSTITUTION:This system is provided with a ROM 2 in which a system program executed by a CPU 1 is stored, a RAM 3 of an input/output buffer memory, etc., an input circuit 4, an output circuit 5, and a stepping deciding circuit 6 for deciding the stepping of a counter CT. The stepping deciding circuit 6 is constituted of a temporary storage circuit 10 for storing temporarily logical values for showing logical states of an up-input and a down-input of this time and the previous time in count operation use clock input signals of the counter CT, and a stepping condition deciding circuit 11 for operating a stepping condition of the counter CT, based on this logical data and driving a result of decision as to whether the count operation is to be executed or not, etc. In such a way, the stepping condition of the counter in a counter processing instruction can be processed by a hardware, and also, the processing can be executed at a high speed by using a general purpose microcomputer.

Description

【発明の詳細な説明】[Detailed description of the invention]

Claims (1)

【特許請求の範囲】 カウンタ命令を含む予め定めたプログラムをサイクリッ
クに実行するプログラマブル・コントローラのカウンタ
命令実行方式において、 カウンタのカウント動作用入力信号のうちの前回の入力
信号の論理値と、今回の入力信号の論理値とを一時記憶
する一時記憶回路と、 一時記憶回路からの出力に応答して、前回の入力信号の
論理値と今回の入力信号の論理値に基づき、カウンタ命
令の歩進条件を論理演算してカウント動作すべきか否か
の判定結果を求める論理演算回路と、 カウンタ命令実行中に、前回の入力信号と今回の入力信
号の各論理値データを作成して、この論理値データを一
時記憶回路に書込み、論理演算回路から判定結果を読出
し、この判定結果に基づいてカウンタ命令を実行する処
理回路とを、 備えたことを特徴とするプログラマブル・コントローラ
のカウンタ命令実行方式。
[Claims] In a counter instruction execution method for a programmable controller that cyclically executes a predetermined program including a counter instruction, the logic value of the previous input signal among the input signals for counting operation of the counter and the current a temporary memory circuit that temporarily stores the logic value of the input signal; and in response to the output from the temporary memory circuit, the counter instruction is incremented based on the logic value of the previous input signal and the logic value of the current input signal. A logic operation circuit that performs logical operations on conditions to determine whether or not to perform a counting operation; and a logic operation circuit that generates each logical value data of the previous input signal and the current input signal during the execution of the counter instruction, and calculates the logical value A counter instruction execution method for a programmable controller, comprising: a processing circuit that writes data to a temporary storage circuit, reads a determination result from a logic operation circuit, and executes a counter instruction based on the determination result.
JP30545388A 1988-12-01 1988-12-01 Counter instruction executing system of programmable controller Pending JPH02250103A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30545388A JPH02250103A (en) 1988-12-01 1988-12-01 Counter instruction executing system of programmable controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30545388A JPH02250103A (en) 1988-12-01 1988-12-01 Counter instruction executing system of programmable controller

Publications (1)

Publication Number Publication Date
JPH02250103A true JPH02250103A (en) 1990-10-05

Family

ID=17945329

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30545388A Pending JPH02250103A (en) 1988-12-01 1988-12-01 Counter instruction executing system of programmable controller

Country Status (1)

Country Link
JP (1) JPH02250103A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04218806A (en) * 1991-04-16 1992-08-10 Mitsubishi Electric Corp Sequence instruction processing circuit for programmable controller

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5437675A (en) * 1977-08-31 1979-03-20 Toshiba Corp Pulse count circuit
JPS6187425A (en) * 1984-10-03 1986-05-02 Omron Tateisi Electronics Co Time division count circuit for incremental type encoder
JPS62256102A (en) * 1986-04-30 1987-11-07 Omron Tateisi Electronics Co Programmable controller

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5437675A (en) * 1977-08-31 1979-03-20 Toshiba Corp Pulse count circuit
JPS6187425A (en) * 1984-10-03 1986-05-02 Omron Tateisi Electronics Co Time division count circuit for incremental type encoder
JPS62256102A (en) * 1986-04-30 1987-11-07 Omron Tateisi Electronics Co Programmable controller

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04218806A (en) * 1991-04-16 1992-08-10 Mitsubishi Electric Corp Sequence instruction processing circuit for programmable controller

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