KR870006484A - Process control method and apparatus using microprocessor - Google Patents

Process control method and apparatus using microprocessor Download PDF

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Publication number
KR870006484A
KR870006484A KR1019850009746A KR850009746A KR870006484A KR 870006484 A KR870006484 A KR 870006484A KR 1019850009746 A KR1019850009746 A KR 1019850009746A KR 850009746 A KR850009746 A KR 850009746A KR 870006484 A KR870006484 A KR 870006484A
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KR
South Korea
Prior art keywords
rom
task
program
microprocessor
control
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Application number
KR1019850009746A
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Korean (ko)
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KR890001226B1 (en
Inventor
윤풍
강신이
한명환
이광순
신연호
Original Assignee
채영복
재단법인 한국화학연구소
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Application filed by 채영복, 재단법인 한국화학연구소 filed Critical 채영복
Priority to KR1019850009746A priority Critical patent/KR890001226B1/en
Publication of KR870006484A publication Critical patent/KR870006484A/en
Application granted granted Critical
Publication of KR890001226B1 publication Critical patent/KR890001226B1/en

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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/04Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
    • G05B19/0426Programming the control sequence
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24Handling requests for interconnection or transfer for access to input/output bus using interrupt

Abstract

내용 없음.No content.

Description

마이크로 프로세서를 이용한 공정제어방법 및 장치Process control method and apparatus using microprocessor

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명에 따른 블록도.1 is a block diagram according to the present invention.

제2도는 제1도에 도시된 롬제어회로의 상세도.2 is a detailed view of the ROM control circuit shown in FIG.

제3도는 본 발명에 따른 인터럽트 및 프로그램스케듈링의 플로우차트.3 is a flowchart of interrupts and program scheduling in accordance with the present invention.

제4도는 본 발명에 따른 프로그램진행순서도.4 is a flow chart of the program according to the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : 공정신호입력 2 : 멀티플렉셔1: process signal input 2: multiplexer

3 : A/D변환기 4 : 입력포트3: A / D converter 4: Input port

5 : 클럭 6 : 중앙처리장치(CPU)5: clock 6: central processing unit (CPU)

7 : 롬 제어회로(ROMC) 8 : 램(RAM)7: ROM Control Circuit (ROMC) 8: RAM

9 : 시스템롬(ROMS) 10 : 롬(ROM1-ROMn)9: System ROM (ROMS) 10: ROM (ROM 1 -ROM n )

11 : 출력포트 12 : D/A변환기11: output port 12: D / A converter

13 : 작동기(actuator) 14 : 플로피 디스크드라이브13: actuator 14: floppy disk drive

15 : CRT FF : 플립플롭15: CRT FF: Flip-Flop

LAT1-LAT2: 래치회로 ROMC : 제어롬LAT 1 -LAT 2 : Latch Circuit ROMC: Control ROM

ROMD : ROM선택회로 ABUS : 어드레스버스ROMD: ROM selection circuit ABUS: Address bus

DBUS : 데이타버스DBUS: Databus

Claims (2)

마이크로프로세서를 이용하여 공정제어를 하는 방법에 있어서, 각 공정프로그램을 롬(ROM)에서 버퍼메모리(RAM)으로 이송시키고 CPU에서 인터럽터제어기를 운용시켜 해당 타스크공정을 인터럽터운여 각 타스크에 설정된 타이머값을 하나씩 감소시켜서 해당 타스크에 설정된 타이머값이 “0”인가를 검색하고 “0”이 아닐때 타스크들의 수행이 모두 완료되었나를 검색하며 여기서 완료되었을시 리턴되고 완료되지 않았을시 다음 타스크로 가서 설정된 타스크타이머값이 “0”인지의 여부를 다시 검색해서 “0”일때는 해당되는 타스크 타이머를 다시 세트시키고 타스크벡터를 참조하여 해당 프로그램을 수행하여 작동기로 제어출력을 보내도록 하는 것을 특징으로 하는 마이크로프로세서를 이용한 공정제어방법.In a process control method using a microprocessor, each process program is transferred from a ROM to a buffer memory, and an interrupt controller is operated in the CPU to interrupt the task process and set a timer value for each task. Decreases by one to search if the timer value set for the task is “0”. If it is not “0”, it searches whether the execution of tasks is completed. If it is completed, it is returned. If the value is “0”, the microprocessor is characterized by resetting the task timer when it is “0” and executing the corresponding program by referring to the task vector to send control output to the actuator. Process control method using. 공정제어입력(1), 멀티플렉서(2), A/D변환기(3), 입력포트(4), 클량(5), 중앙처리장치(6), 램(8), 시스템롬(9), 출력포트(11), D/A변환기(12), 작동기(13), FDD(14)로 구성된 공정제어장치에 있어서, 각 공정타스크프로그램이 내장되어 있는 프로그램 롬(ROM1-ROMn)과, 상기 각 롬을 제어하기 위한 롬제어프로그램이 내장되어 있는 제어롬(ROMC)과, 리세트나 전원 “온”시 제어롬과 프로그램 롬(ROM1∼ROMn) 또는 램(RAM)뱅크를 선택하여 이를 유지시켜주는 래치회로(LAT1-LAT2)와, 데이타버스(DBUS)의 코드에 의해 롬을 선택하는 롬선택회로(ROMD)로 구성된 것을 특징으로 하는 마이크로프로세서를 이용한 공정제어장치.Process control input (1), multiplexer (2), A / D converter (3), input port (4), clock amount (5), central processing unit (6), RAM (8), system ROM (9), output A process control device comprising a port 11, a D / A converter 12, an actuator 13, and an FDD 14, comprising: a program ROM (ROM 1- ROM n ) in which each process task program is embedded; Control ROM (ROMC) with built-in ROM control program to control each ROM, control ROM and program ROM (ROM 1 to ROM n ) or RAM bank when reset or power-on A process control device using a microprocessor, comprising: a latch circuit (LAT 1 -LAT 2 ) for holding and a ROM selection circuit (ROMD) for selecting a ROM by a code of a data bus (DBUS). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019850009746A 1985-12-23 1985-12-23 A processing control device used micro processor KR890001226B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019850009746A KR890001226B1 (en) 1985-12-23 1985-12-23 A processing control device used micro processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019850009746A KR890001226B1 (en) 1985-12-23 1985-12-23 A processing control device used micro processor

Publications (2)

Publication Number Publication Date
KR870006484A true KR870006484A (en) 1987-07-11
KR890001226B1 KR890001226B1 (en) 1989-04-27

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