JPH02168619A - シリコーンゴム膜のパターン形成方法 - Google Patents

シリコーンゴム膜のパターン形成方法

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Publication number
JPH02168619A
JPH02168619A JP63324492A JP32449288A JPH02168619A JP H02168619 A JPH02168619 A JP H02168619A JP 63324492 A JP63324492 A JP 63324492A JP 32449288 A JP32449288 A JP 32449288A JP H02168619 A JPH02168619 A JP H02168619A
Authority
JP
Japan
Prior art keywords
silicone rubber
film
rubber film
etching
patterned
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP63324492A
Other languages
English (en)
Other versions
JP2597396B2 (ja
Inventor
Kozo Matsuo
松尾 浩三
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
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Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP63324492A priority Critical patent/JP2597396B2/ja
Priority to US07/452,360 priority patent/US4988403A/en
Priority to CA002006175A priority patent/CA2006175C/en
Publication of JPH02168619A publication Critical patent/JPH02168619A/ja
Application granted granted Critical
Publication of JP2597396B2 publication Critical patent/JP2597396B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 (a)産業上の利用分野 この発明は半導体装置などにおいてコート剤や緩衝材層
として用いられるシリコーンゴム膜のパターン形成方法
に関する。
伽)従来の技術 電子部品や回路基板を製造する分野において一般にシリ
コーンゴムは基板上に実装された電子部品を保護するた
めに所謂ジャンクションコート剤として用いられている
。このような目的で電子部品などをコーティングする方
法としては従来のエポキシ系樹脂によるコーティングと
同様にポツテング法が採られている。
また、最近では粘度などを調整することによってスピン
コート法によってコーティングすることのできるシリコ
ーンゴム材料も開発され、これがウェハプロセスによる
半導体装置の製造にも利用されるようになっている。
(C1発明が解決しようとする課題 ウェハプロセスによる半導体装置への利用としては、例
えばポンディングパッド部分を開口させてその他の表面
に一定膜厚のシリコーンゴム膜を被覆することによって
、シリコーンゴム膜を緩衝材およびパッシベーション膜
として用いることがあげられる。
ところが、シリコーンゴム材料は化学的に安定であり、
ウェットエツチング法による化学的エツチング法を採る
ことができず、物理的エツチング法によらなければなら
ない。しかしながら、たとえば反応性スパッタエツチン
グ(反応性イオンエツチング)法などによってもレジス
ト膜とシリコーンゴム膜との選択比が小さく、しかもシ
リコーンゴム膜のエツチングレートが小さいため、シリ
コーンゴム膜の膜厚が5〜10μm程度の厚膜になると
開口部を形成することが困難であった。
この発明の目的は、膜厚の大きなシリコーンゴム膜のパ
ターン加工効率および加工精度を高めたシリコーンゴム
膜のパターン形成方法を提供することにある。
fd)課題を解決するための手段 この発明のシリコーンゴム膜のパターン形成方法は、シ
リコーンゴム膜を形成すべき基体に開口部形成用膜を被
着する工程と、 この開口部形成用膜をリングラフィによりパターン化す
る工程と、 パターン化された開口部形成用膜の被着された前記基体
上にシリコーンゴム膜をスピンコートする工程と、 前記パターン化された開口部形成用膜上のシリコーンゴ
ム膜をエツチングする工程と、前記パターン化された開
口部形成用膜をエツチングする工程と、 からなることを特徴としている。
(e)作用 −の発明のシリコーンゴム膜のパターン形成方法におい
ては、先ず基体に開口部形成用膜が被着され、この開口
部形成用膜がリソグラフィによりパターン化される。つ
づいてこのパターン化された開口部形成用膜の被着され
た基体上にシリコーンゴム膜がスピンコートされる。ス
ピンコートされたシリコーンゴム膜は平坦となるため、
ポリイミド膜の膜厚をシリコーンゴム膜の膜厚に近くす
ることによって、ポリイミド膜上部のシリコーンゴム膜
の膜厚を非常に薄(することができる。つづくエツチン
グ工程では前記パターン化された開口部形成用膜上のシ
リコーンゴム膜がエツチングされ、更にパターン化され
た開口部形成用膜がエツチングされる。例えばプラズマ
エツチング法などによって全体をエツチングすることに
より前記パターン化された開口部形成用膜が露出される
この後、例えばヒドラジン系エツチング液などシリコー
ンゴムと開口部形成用膜材料との選択比が大きなエツチ
ング液を利用し開口部形成用膜を除去することによって
、シリコーンゴム膜のパターン化が可能となる。
以上のようにエツチングレジスト剤を用いてシリコーン
ゴム膜を直接エツチングするのではな(、シリコーンゴ
ム膜との選択比を大きくとることのできる開口部形成用
膜をパターン形成用に用い、シリコーンゴムのスピンコ
ート時の平坦化特性を利用したことにより、膜厚が大き
なシリコーンゴム膜であっても高効率および高精度でパ
ターン形成を行うことができる。
(fl実施例 この発明の実施例であるシリコーンゴム膜のパターン形
成方法の例を第1図(A)〜(E)に示す。
この例は、開口部形成用膜としてポリイミド膜を用い、
AI!配線パターンの施された半導体基板にシリコーン
ゴム膜を被覆するとともにポンディングパッド部分を開
口させる例である。同図において1はシリコンウェハ、
2は酸化膜、3a、3bはΔβ配線パターン、4はポリ
イミド膜、5はシリコーンゴム膜である。以下各工程に
ついて順に説明する。
(1)ポリイミド膜被着工程 第1図(A)に示すようにシリコンウェハ1の酸化膜2
上にAl配綿パターン3a、3bが形成されたウェハの
全面にポリイミド膜4をスピンコート法により被着する
。例えば3000〜4000rpm(ただしこの値は粘
度に応じて定める。
)で10μmの膜厚を得る。
(2)ポリイミド膜のパターン化工程 第1図(B)に示すように、フォトリソグラフィにより
、後にシリコーンゴム膜の開口部となる領域以外の領域
を除去してポリイミドWA4a、4bを残す。その際、
レジスト膜にはポジ型フォトレジストを用い、アルカリ
水溶液によって現像する。
(3)シリコーンゴム膜のスビンコート工程第1図(C
)に示すようにシリコーンゴム膜5をウェハの全面にス
ピンコートする。例えば4000rpm(ただしこの値
は粘度に応じて定める、)でポリイミド膜4a、4bの
上部におけるシリコーンゴム膜の膜厚が2〜3μmとな
るようにコーティングする。
(4)シリコーンゴム膜エツチング工程第1図(D)に
示すように、シリコーンゴム膜5全体をエツチングして
パターン化されているポリイミド膜4a、4bを露出さ
せる。例えばフン化物系のガスを用いてプラズマエツチ
ングする。
このときポリイミド膜4a、4bもエツチングされるが
、ポリイミド膜が露出されればよく、このことは何ら問
題とはならない。
(5)ポリイミド膜のエツチング工程 第1図(E)に示すようにパターン化されたポリイミド
膜(4a、4b)を除去してその部分に開口部6a、6
bを形成する。ここでは例えばヒドラジン系のエツチン
グ液を用いる。ヒドラジン系エツチング液はポリイミド
とシリコーンゴムに対し大きな選択比を有するため、ポ
リイミド膜のみ選択的に除去することができる。
以上のようにしてシリコーンゴム膜をパターン形成する
ため、シリコーンゴム膜5のエツチングは第1図(C)
および(D)に示したようにポリイミド114a、4b
を露出させるに要するだけであり、エツチング量が少な
く、加工効率が高い。
このようにしてパターン化されたシリコーンゴム膜の被
覆され°た半導体チップに対してワイヤボンディングさ
れた状態を第2図に示す。同図において7a、7bはボ
ンディングワイヤであり、シリコーンゴム膜5に形成さ
れた開口部5a、5bのポンディングパッドにボンディ
ングされている。このように予めウェハプロセスによっ
てシリコーンゴム膜が形成されるため、ワイヤボンディ
ング後に個々にシリコーンゴム剤をボッティングする必
要がなくなる。
なお、実施例では開口部形成用膜材料としてポリイミド
を用いたが、通常のレジスト膜材料を用いることもでき
る。
(g1発明の効果 以上のようにこの発明によれば、開口部を形成すべき領
域に予め開口部形成用膜をパターン化して形成しておく
ため、シリコーンゴム膜のエツチング量は極めて少なく
なり、膜厚の大きなシリコーンゴム膜を効率よくパター
ン形成することができる。また、開口部形成用膜とシリ
コーンゴムはエツチング液を選ぶことによって高い選択
比が得られるため、シリコーンゴム膜の膜厚が大きくと
も寸法精度の高いパターンを容易に形成することができ
る。
【図面の簡単な説明】
第1図(A)〜(E)はこの発明の実施例であるシリコ
ーンゴム膜のパターン形成方法の例を示す図、第2図は
この発明の実施例により得られた半導体チップに対する
ワイヤボンディング後の状態を示す図である。 1−シリコンウェハ、 2−酸化膜、 3 (3a、3b)−/lj!配線パターン、4 (4
a、4b)−ポリイミド膜、 5−シリコーンゴム膜、 5a、5b−開口部、 7a、7b−ボンディングワイヤ。

Claims (1)

    【特許請求の範囲】
  1. (1)シリコーンゴム膜を形成すべき基体に開口部形成
    用膜を被着する工程と、 この開口部形成用膜をリソグラフィによりパターン化す
    る工程と、 パターン化された開口部形成用膜の被着された前記基体
    上にシリコーンゴム膜をスピンコートする工程と、 前記パターン化された開口部形成用膜上のシリコーンゴ
    ム膜をエッチングする工程と、 前記パターン化された開口部形成用膜をエッチングする
    工程と、 からなるシリコーンゴム膜のパターン形成方法。
JP63324492A 1988-12-21 1988-12-21 シリコーンゴム膜のパターン形成方法 Expired - Fee Related JP2597396B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP63324492A JP2597396B2 (ja) 1988-12-21 1988-12-21 シリコーンゴム膜のパターン形成方法
US07/452,360 US4988403A (en) 1988-12-21 1989-12-19 Method of forming patterned silicone rubber layer
CA002006175A CA2006175C (en) 1988-12-21 1989-12-20 Method of forming patterned silicone rubber layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63324492A JP2597396B2 (ja) 1988-12-21 1988-12-21 シリコーンゴム膜のパターン形成方法

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JPH02168619A true JPH02168619A (ja) 1990-06-28
JP2597396B2 JP2597396B2 (ja) 1997-04-02

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JPH04261049A (ja) * 1991-01-31 1992-09-17 Mitsubishi Electric Corp 半導体装置およびその製造方法
US5450286A (en) * 1992-12-04 1995-09-12 Parlex Corporation Printed circuit having a dielectric covercoat
SE9502258D0 (sv) * 1995-06-21 1995-06-21 Pharmacia Biotech Ab Method for the manufacture of a membrane-containing microstructure
FR2750250B1 (fr) * 1996-06-20 1998-08-21 Solaic Sa Procede de protection d'une galette de circuits integres, et galette de circuits integres obtenue
US20040102022A1 (en) * 2002-11-22 2004-05-27 Tongbi Jiang Methods of fabricating integrated circuitry

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JPS61222179A (ja) * 1985-03-27 1986-10-02 Nec Corp 半導体装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011258770A (ja) * 2010-06-09 2011-12-22 Sumitomo Electric Ind Ltd 積層樹脂膜の形成方法及び半導体デバイスの製造方法

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CA2006175A1 (en) 1990-06-21
CA2006175C (en) 1993-06-15
US4988403A (en) 1991-01-29
JP2597396B2 (ja) 1997-04-02

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