JPH02123179U - - Google Patents
Info
- Publication number
- JPH02123179U JPH02123179U JP3087389U JP3087389U JPH02123179U JP H02123179 U JPH02123179 U JP H02123179U JP 3087389 U JP3087389 U JP 3087389U JP 3087389 U JP3087389 U JP 3087389U JP H02123179 U JPH02123179 U JP H02123179U
- Authority
- JP
- Japan
- Prior art keywords
- liquid crystal
- crystal display
- control means
- conversion circuit
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000006243 chemical reaction Methods 0.000 claims description 6
- 239000004973 liquid crystal related substance Substances 0.000 claims 4
- 238000005070 sampling Methods 0.000 claims 2
- 238000000034 method Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Liquid Crystal Display Device Control (AREA)
- Transforming Electric Information Into Light Information (AREA)
Description
第１図ないし第３図は本考案の一実施例を示す
もので、第１図は回路構成を示すブロツク図、第
２図はＡ／Ｄ変換されたｎビツトのデータと加算
処理後のｎ−１ビツトの出力データとの関係を示
す図、第３図ａ，ｂは表示データの分割動作を示
す図、第４図及び第５図は従来回路における表示
データの分割動作を説明するための図である。
１１……Ａ／Ｄ変換回路、１４……加算器、１
５……フリツプフロツプ、１６，１７……イクス
クルーシブオア回路（ＥＸオア回路）。
1 to 3 show an embodiment of the present invention, in which FIG. 1 is a block diagram showing the circuit configuration, and FIG. 2 shows n-bit data after A/D conversion and n bits after addition processing. Figures 3a and 3b are diagrams showing the display data division operation, and Figures 4 and 5 are diagrams for explaining the display data division operation in the conventional circuit. It is a diagram. 11...A/D conversion circuit, 14...Adder, 1
5...Flip-flop, 16, 17...Exclusive OR circuit (EX OR circuit).
Claims (1)
データ処理回路において、アナログ映像信号をサ
ンプリングクロツクに同期してｎビツトのデジタ
ルデータに変換するＡ／Ｄ変換回路と、このＡ／
Ｄ変換回路の出力データ中の最下位ビツトと他の
ビツトとを加算してｎ−１ビツトのデジタルデー
タとして出力する加算手段と、上記Ａ／Ｄ変換回
路の最下位出力ビツトと上記加算手段との間に設
けられるゲート回路と、このゲート回路を上記サ
ンプリングクロツクに同期して交互にオン／オフ
制御するゲート制御手段と、このゲート制御手段
の出力信号を上記液晶表示部の１水平走査ライン
毎に反転する第１の反転制御手段と、この第１の
反転制御手段の出力信号を上記液晶表示部の１フ
イールド毎に交互に反転制御する第２の反転制御
手段とを具備したことを特徴とする液晶表示デー
タ処理回路。 A liquid crystal display data processing circuit that processes display data to a liquid crystal display section includes an A/D conversion circuit that converts an analog video signal into n-bit digital data in synchronization with a sampling clock, and this A/D conversion circuit.
Adding means for adding the least significant bit in the output data of the D conversion circuit and other bits and outputting the result as n-1 bit digital data; and the least significant output bit of the A/D conversion circuit and the adding means; a gate circuit provided between the two; a gate control means for alternately controlling the gate circuit on and off in synchronization with the sampling clock; and an output signal of the gate control means for controlling one horizontal scanning line of the liquid crystal display section. and a second inversion control means that alternately controls the inversion of the output signal of the first inversion control means for each field of the liquid crystal display section. LCD display data processing circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3087389U JPH075732Y2 (en) | 1989-03-20 | 1989-03-20 | Liquid crystal display data processing circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3087389U JPH075732Y2 (en) | 1989-03-20 | 1989-03-20 | Liquid crystal display data processing circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02123179U true JPH02123179U (en) | 1990-10-09 |
| JPH075732Y2 JPH075732Y2 (en) | 1995-02-08 |
Family
ID=31256310
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3087389U Expired - Lifetime JPH075732Y2 (en) | 1989-03-20 | 1989-03-20 | Liquid crystal display data processing circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH075732Y2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06118921A (en) * | 1992-10-02 | 1994-04-28 | Sanyo Electric Co Ltd | Method and device for image information processing |
-
1989
- 1989-03-20 JP JP3087389U patent/JPH075732Y2/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06118921A (en) * | 1992-10-02 | 1994-04-28 | Sanyo Electric Co Ltd | Method and device for image information processing |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH075732Y2 (en) | 1995-02-08 |
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