JPS61171378U - - Google Patents
Info
- Publication number
- JPS61171378U JPS61171378U JP5587585U JP5587585U JPS61171378U JP S61171378 U JPS61171378 U JP S61171378U JP 5587585 U JP5587585 U JP 5587585U JP 5587585 U JP5587585 U JP 5587585U JP S61171378 U JPS61171378 U JP S61171378U
- Authority
- JP
- Japan
- Prior art keywords
- information
- latch
- calculated
- output
- case
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 4
- 238000004040 coloring Methods 0.000 description 1
Landscapes
- Studio Circuits (AREA)
Description
第１図は本考案の一実施例を示すブロツク図、
第２図はキヤプテンシステム等によるブロツク着
色フレーム構成に対応するメモリ構成の説明に供
する図、第３図はスーパインポーズ表示の一例を
示す図、第４図は同じく他の例を示す図である。
１……テレビ画面、２……テレビ映像、９……
８ビツトラツチ、１０，１１……ＡＮＤゲート、
１２……ＯＲゲート。
FIG. 1 is a block diagram showing an embodiment of the present invention.
Fig. 2 is a diagram for explaining the memory configuration corresponding to the block coloring frame configuration by the captain system, etc., Fig. 3 is a diagram showing an example of a superimpose display, and Fig. 4 is a diagram showing another example. be. 1...TV screen, 2...TV image, 9...
8 bit latch, 10, 11...AND gate,
12...OR gate.
Claims (1)
する装置において、ドツト単位若しくはブロツク
単位でのスーパインポーズに対応してそれぞれＹ
ｓイネーブル信号がセツトされるラツチと、前記
ドツト単位の場合前記ラツチの出力、ドツト単位
のパターン情報及びブロツク単位のＹｓ情報の論
理和をとり、ブロツク単位の場合前記ラツチの出
力及び前記Ｙｓ情報の論理和をとり、表示用のＹ
ｓ信号を出力する回路とを有する信号処理装置。 In a device that displays other information in a superimposed manner on a part of the screen, Y corresponds to the superimposition in units of dots or blocks.
The latch in which the s enable signal is set, the output of the latch in the case of the dot unit, the pattern information in the dot unit, and the Ys information in the block unit are calculated, and the output of the latch and the Ys information in the case of the block unit are calculated. Take the logical sum and display Y
A signal processing device having a circuit that outputs an s signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5587585U JPS61171378U (en) | 1985-04-15 | 1985-04-15 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5587585U JPS61171378U (en) | 1985-04-15 | 1985-04-15 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61171378U true JPS61171378U (en) | 1986-10-24 |
Family
ID=30578960
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5587585U Pending JPS61171378U (en) | 1985-04-15 | 1985-04-15 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61171378U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61264989A (en) * | 1985-05-20 | 1986-11-22 | Mitsubishi Electric Corp | Terminal equipment for captain |
-
1985
- 1985-04-15 JP JP5587585U patent/JPS61171378U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61264989A (en) * | 1985-05-20 | 1986-11-22 | Mitsubishi Electric Corp | Terminal equipment for captain |
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