JPS63156124U - - Google Patents
Info
- Publication number
- JPS63156124U JPS63156124U JP4838987U JP4838987U JPS63156124U JP S63156124 U JPS63156124 U JP S63156124U JP 4838987 U JP4838987 U JP 4838987U JP 4838987 U JP4838987 U JP 4838987U JP S63156124 U JPS63156124 U JP S63156124U
- Authority
- JP
- Japan
- Prior art keywords
- digit
- output
- input
- data
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims 3
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Measurement Of Current Or Voltage (AREA)
- Analogue/Digital Conversion (AREA)
Description
第１図はこの考案の一実施例にかかるＤＭＭ用
Ａ／Ｄ変換器のブロツク図、第２図及び第３図は
使用例を示すブロツク図、第４図は従来のＤＭＭ
用Ａ／Ｄ変換器のブロツク図である。
１……データレジスタ、２……データセレクタ
、３……カウンタ、４，７，８……デコーダ、５
……エンコーダ、６……並行入出力ＩＣ、１１…
…ＤＭＭ用Ａ／Ｄ変換器（本考案）、１２……Ｄ
ＭＭ用Ａ／Ｄ変換器（従来例）。
Fig. 1 is a block diagram of an A/D converter for DMM according to an embodiment of this invention, Figs. 2 and 3 are block diagrams showing an example of its use, and Fig. 4 is a block diagram of a conventional DMM.
1 is a block diagram of an A/D converter for 1...Data register, 2...Data selector, 3...Counter, 4, 7, 8...Decoder, 5
...Encoder, 6...Parallel input/output IC, 11...
...A/D converter for DMM (this invention), 12...D
A/D converter for MM (conventional example).
Claims (1)
データを桁毎に蓄えておくレジスタと、出力クロ
ツクに応じて桁信号を発生する回路と、桁信号の
入出力端子と、上記桁信号の入出力端子を入力用
と出力用とに切り換える信号の入力端子と、桁信
号に応じてデータを桁毎に出力するデータセレク
タと、桁毎のデータを出力するための出力端子と
を備えるＡ／Ｄ変換器。 An A/D conversion circuit, a register that stores the output data of this A/D conversion circuit for each digit, a circuit that generates a digit signal according to the output clock, an input/output terminal for the digit signal, and a register that stores the output data of the A/D conversion circuit for each digit. A is provided with a signal input terminal for switching the input/output terminal between input and output, a data selector for outputting data for each digit according to the digit signal, and an output terminal for outputting data for each digit. /D converter.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4838987U JPS63156124U (en) | 1987-03-31 | 1987-03-31 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4838987U JPS63156124U (en) | 1987-03-31 | 1987-03-31 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63156124U true JPS63156124U (en) | 1988-10-13 |
Family
ID=30869871
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4838987U Pending JPS63156124U (en) | 1987-03-31 | 1987-03-31 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63156124U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04185020A (en) * | 1990-11-19 | 1992-07-01 | Mitsubishi Electric Corp | A-d converter |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57171829A (en) * | 1981-04-16 | 1982-10-22 | Toshiba Corp | Analog-to-digital converter |
| JPS5966741A (en) * | 1982-10-07 | 1984-04-16 | Omron Tateisi Electronics Co | Analog-digital converter |
-
1987
- 1987-03-31 JP JP4838987U patent/JPS63156124U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57171829A (en) * | 1981-04-16 | 1982-10-22 | Toshiba Corp | Analog-to-digital converter |
| JPS5966741A (en) * | 1982-10-07 | 1984-04-16 | Omron Tateisi Electronics Co | Analog-digital converter |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04185020A (en) * | 1990-11-19 | 1992-07-01 | Mitsubishi Electric Corp | A-d converter |
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