JPH0191333U - - Google Patents
Info
- Publication number
- JPH0191333U JPH0191333U JP18664687U JP18664687U JPH0191333U JP H0191333 U JPH0191333 U JP H0191333U JP 18664687 U JP18664687 U JP 18664687U JP 18664687 U JP18664687 U JP 18664687U JP H0191333 U JPH0191333 U JP H0191333U
- Authority
- JP
- Japan
- Prior art keywords
- input
- type channel
- mos transistor
- connection point
- series
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Description
第１図は本考案のシユミツト回路、第２図は第
１図のシユミツト回路のヒステリシス特性、第３
図は従来のシユミツト回路である。
１……入力端子、７……出力端子、２，４……
Ｐチヤンネル型ＭＯＳトランジスタ、３，５……
Ｎチヤンネル型ＭＯＳトランジスタ、６，１０…
…インバータ、８……２入力ＮＡＮＤ、９……２
入力ＮＯＲ、１１……選択端子。
Figure 1 shows the Schmitt circuit of the present invention, Figure 2 shows the hysteresis characteristics of the Schmitt circuit in Figure 1, and Figure 3 shows the hysteresis characteristics of the Schmitt circuit in Figure 1.
The figure shows a conventional Schmitt circuit. 1...Input terminal, 7...Output terminal, 2, 4...
P channel type MOS transistor, 3, 5...
N-channel type MOS transistor, 6, 10...
...Inverter, 8...2 input NAND, 9...2
Input NOR, 11...Selection terminal.
Claims (1)
型チヤンネルのＭＯＳトランジスタと直列接続し
た第１及び第２の直列回路を有し、前記第１の直
列回路の第１型及び第２型チヤンネルのＭＯＳト
ランジスタのそれぞれのゲートと入力端子を接続
し、前記第１及び第２の直列回路の第１型チヤン
ネルのＭＯＳトランジスタと第２型チヤンネルの
ＭＯＳトランジスタとの接続点とを共通に接続し
、前記接続点からインバータを介して出力を得る
シユミツト回路において、前記第２の直列回路の
１型チヤンネルのＭＯＳトランジスタのゲートに
、前記接続点を一方の入力とする２入力ＮＡＮＤ
の出力を接続し、前記第２の直列回路の第２型チ
ヤンネルのＭＯＳトランジスタのゲートに前記接
続点を一方の入力とする２入力ＮＯＲの出力を接
続し、前記２入力ＮＯＲの他の入力には選択信号
を入力し、前記２入力ＮＡＮＤの他の入力には前
記選択信号を反転入力して成ることを特徴とする
シユミツト回路。 1st type channel MOS transistor and 2nd type channel MOS transistor
the first and second series circuits connected in series with the MOS transistors of the first type channel and the respective gates of the MOS transistors of the first type channel and the second type channel of the first series circuit and the input terminals, In a Schmitt circuit, a connection point between a first type channel MOS transistor and a second type channel MOS transistor of the first and second series circuits is commonly connected, and an output is obtained from the connection point via an inverter. , a two-input NAND with the connection point as one input is connected to the gate of the type 1 channel MOS transistor of the second series circuit.
connect the output of the 2-input NOR with the connection point as one input to the gate of the MOS transistor of the second type channel of the second series circuit, and connect the output of the 2-input NOR with the connection point as one input; A Schmitt circuit is characterized in that a selection signal is inputted thereto, and the selection signal is inverted and inputted to the other input of the two-input NAND.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18664687U JPH0191333U (en) | 1987-12-07 | 1987-12-07 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18664687U JPH0191333U (en) | 1987-12-07 | 1987-12-07 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0191333U true JPH0191333U (en) | 1989-06-15 |
Family
ID=31477862
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18664687U Pending JPH0191333U (en) | 1987-12-07 | 1987-12-07 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0191333U (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS586620A (en) * | 1981-07-03 | 1983-01-14 | Toshiba Corp | Schmitt trigger circuit |
| JPS61237509A (en) * | 1985-04-12 | 1986-10-22 | Nec Corp | Schmitt trigger circuit |
-
1987
- 1987-12-07 JP JP18664687U patent/JPH0191333U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS586620A (en) * | 1981-07-03 | 1983-01-14 | Toshiba Corp | Schmitt trigger circuit |
| JPS61237509A (en) * | 1985-04-12 | 1986-10-22 | Nec Corp | Schmitt trigger circuit |
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