JPH02147934U - - Google Patents

Info

Publication number
JPH02147934U
JPH02147934U JP5662889U JP5662889U JPH02147934U JP H02147934 U JPH02147934 U JP H02147934U JP 5662889 U JP5662889 U JP 5662889U JP 5662889 U JP5662889 U JP 5662889U JP H02147934 U JPH02147934 U JP H02147934U
Authority
JP
Japan
Prior art keywords
mos transistors
gates
connection point
power supplies
output terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5662889U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP5662889U priority Critical patent/JPH02147934U/ja
Publication of JPH02147934U publication Critical patent/JPH02147934U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例の出力バツフア回路
の回路図、第2図は従来の出力バツフア回路の回
路図である。 1,2……回路節点、3,5……電源端子、4
,6……接地端子、7,8……入力端子、13…
…出力端子、9,11,14……PチヤンネルM
OSトランジスタ、10,12,15……Nチヤ
ンネルMOSトランジスタ。
FIG. 1 is a circuit diagram of an output buffer circuit according to an embodiment of the present invention, and FIG. 2 is a circuit diagram of a conventional output buffer circuit. 1, 2...Circuit node, 3, 5...Power terminal, 4
, 6... Ground terminal, 7, 8... Input terminal, 13...
...Output terminal, 9, 11, 14...P channel M
OS transistor, 10, 12, 15...N channel MOS transistor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 第1、第2の電源間に、第1、第2のMOSト
ランジスタの直列体を接続し、共通接続点を出力
端子となし、第3、第4の電源間に、第3、第4
のMOSトランジスタの直列体を接続し、共通接
続点を前記出力端子に接続し、前記第1、第3の
MOSトランジスタのゲートを共通接続して第1
の入力端子となし、前記第2、第4のMOSトラ
ンジスタのゲートを共通接続して第2の入力端子
となしたことを特徴とする出力バツフア回路。
A series body of first and second MOS transistors is connected between the first and second power supplies, with the common connection point serving as an output terminal, and a third and fourth MOS transistor are connected between the third and fourth power supplies.
A series body of MOS transistors is connected, a common connection point is connected to the output terminal, and gates of the first and third MOS transistors are connected in common.
An output buffer circuit characterized in that the gates of the second and fourth MOS transistors are commonly connected to form a second input terminal.
JP5662889U 1989-05-16 1989-05-16 Pending JPH02147934U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5662889U JPH02147934U (en) 1989-05-16 1989-05-16

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5662889U JPH02147934U (en) 1989-05-16 1989-05-16

Publications (1)

Publication Number Publication Date
JPH02147934U true JPH02147934U (en) 1990-12-17

Family

ID=31580622

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5662889U Pending JPH02147934U (en) 1989-05-16 1989-05-16

Country Status (1)

Country Link
JP (1) JPH02147934U (en)

Similar Documents

Publication Publication Date Title
JPS6181229U (en)
JPH02147934U (en)
JPS62159024U (en)
JPS6155296U (en)
JPH01108624U (en)
JPH0348924U (en)
JPS61176828U (en)
JPH01126630U (en)
JPH01108623U (en)
JPH0165530U (en)
JPH0431832U (en)
JPH0181036U (en)
JPS6372922U (en)
JPS62203529U (en)
JPS62117841U (en)
JPS6170430U (en)
JPH0348244U (en)
JPS6399421U (en)
JPS6335321U (en)
JPS6157631U (en)
JPS62105636U (en)
JPS6383834U (en)
JPS6381518U (en)
JPH0247831U (en)
JPS61195786U (en)