JPH0348924U - - Google Patents
Info
- Publication number
- JPH0348924U JPH0348924U JP10972589U JP10972589U JPH0348924U JP H0348924 U JPH0348924 U JP H0348924U JP 10972589 U JP10972589 U JP 10972589U JP 10972589 U JP10972589 U JP 10972589U JP H0348924 U JPH0348924 U JP H0348924U
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- amplifier circuit
- supply via
- differential amplifier
- differential
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Manipulation Of Pulses (AREA)
- Amplifiers (AREA)
Description
第１図は本考案の作動増幅回路の一実施例の回
路図、第２図はＰチヤンネルＭＯＳトランジスタ
のエンハンスメント型とデプレツシヨン型の特性
図、第３図は従来の作動増幅回路の回路図である
。
Fig. 1 is a circuit diagram of one embodiment of the operational amplifier circuit of the present invention, Fig. 2 is a characteristic diagram of enhancement type and depletion type of P channel MOS transistor, and Fig. 3 is a circuit diagram of a conventional operational amplifier circuit. .
Claims (1)
接続され、ドレインが能動負荷を介して他方の電
源に接続される２個のＭＯＳトランジスタからな
る差動回路を有する差動増幅回路において、上記
各ＭＯＳトランジスタをデプレツシヨン型で構成
したことを特徴とする差動増幅回路。 In a differential amplifier circuit having a differential circuit consisting of two MOS transistors whose sources are connected to one power supply via a common constant current source and whose drains are connected to the other power supply via an active load, A differential amplifier circuit characterized in that each MOS transistor is configured as a depletion type.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10972589U JPH0348924U (en) | 1989-09-21 | 1989-09-21 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10972589U JPH0348924U (en) | 1989-09-21 | 1989-09-21 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0348924U true JPH0348924U (en) | 1991-05-13 |
Family
ID=31658295
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10972589U Pending JPH0348924U (en) | 1989-09-21 | 1989-09-21 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0348924U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1992004770A1 (en) * | 1990-09-12 | 1992-03-19 | Fujitsu Limited | Differential amplifying circuit of operational amplifier |
| JP2009201119A (en) * | 1996-03-19 | 2009-09-03 | Semiconductor Components Industries Llc | Low voltage operational amplifier and method |
| JP2019165298A (en) * | 2018-03-19 | 2019-09-26 | ローム株式会社 | Chopper-stabilized amplifier |
-
1989
- 1989-09-21 JP JP10972589U patent/JPH0348924U/ja active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1992004770A1 (en) * | 1990-09-12 | 1992-03-19 | Fujitsu Limited | Differential amplifying circuit of operational amplifier |
| JP2009201119A (en) * | 1996-03-19 | 2009-09-03 | Semiconductor Components Industries Llc | Low voltage operational amplifier and method |
| JP2019165298A (en) * | 2018-03-19 | 2019-09-26 | ローム株式会社 | Chopper-stabilized amplifier |